First post, by majestyk
I recently added an ABIT AB-AH4 socket 3 VLB mainboard to my collection.
Initial tests with a DX2/66 CPU were quite disappointing so I decided to do try some upgrades.
Because all the components needed for using 3.3V CPUs are present but unpopulated on this model, I converted it into an ABIT AB-AH4T by adding the necessary components:
- 4 x 3-pin jumper
- regulating transistor plus heatsink
- 2 x resistors as voltage divider for 3.3V output voltage
- one electrolytic capacitor for output filtering 1000µ 10V
- a tantalum capacitor 10 - 22 µF for ripple reduction at the "ADJ" input
Note that the AB-AH4/T does not have landings for the additional resistors that you need to select 3.45V, 3.6 and 4.0V, because ABIT had a fixed regulator for 3.3V in the "T-model". They just prvided the landings for one resistor between the "ADJ"-pin and ground to turn the regulator off completely when 5V CPUS were jumpered.
Here´s a total of the finished mainboard
and here I marked all the components that had to be added
(For the lulz I also added the funky LED left of the last ISA socket and the necessary resistor.)
I then flashed the latest AWARD BIOS and did some testing with a AMD-X5-133ADZ. Everything looked a lot better now, but I found out that write-back isn´t / cannot be enabled for the CPU´s L1 cache.
The chipset definitely does support write-back so I suspected the BIOS to be the issue here.
After editing it with Modbin and enabling all the disabled entries under "chipset features" and rearranging the entries so all of them fit into the left and right table I found the entry "Internal Cache WB/WT" wouldn´t show up in the menue in the left table, a blank line is presented instead (you can also see this in the Modbin preview). Moving it to the right table didn´t help either.
So I tried a hardware mod as a workaround next. The CPU-pin for enabling/disabling WB could be found easily and on the AB-AH4 it´s even routed to a pin (3) of Jumper 15.
According to the AMD x586 datasheet this pin needs to be pulled up during reset to enable WB. I pulled it up with a resistor but either - when the resistor is >47K, WB is not enabled, or, when the reststor is about 10K (or less) the system crashes with a garbled screen at DOS-prompt.
When the pull-up resistor is present during POST and removed immediately after, then WB gets enabled correctly and the system works perfectly.
So I hooked the CPU´s WB-Enable input pin to the SIS 85C471´s "RESET_DRV" output with a 4K7 resistor that provides a pull-up at startup for a short period only and the issue was solved.