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First post, by superfury

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Anyone knows what the actual meaning of bits 4/5 of the 8042 output port is?

OSdev (https://wiki.osdev.org/%228042%22_PS/2_Contro … ler_Output_Port) says it's the status of IRQ1 and output buffer full from first/second PS/2 port (so basically bits 0 and 5 of the status register in 2 bits). So setting bit 5 will set bits 0&5 of the status register and IRQ12 and clear IRQ1. Otherwise, setting bit 4 will set bit 0 of the status register and IRQ2 and clear bit 5 of the status register. If neither is set, bits 0&5 of the status register will be cleared and IRQ1 and IRQ12 lowered?

Or is what Bochs says correct? It's just an input/output buffer full status mirror? What happens when software tries setting/clearing those bits and setting them to a different value than read? Or are they ROM (so writes have no effect on them)?

UniPCemu currently uses them as a output buffer full flag for first/second PS/2 port (according to OSdev).

Anyone knows the truth?

Edit:
Re: 8042 operation and command set
Apparently they aren't the buffer full/aux bits? They're just the IRQ lines driven by the 8042? So the status register is unaffected by it, but changes in the status affects it to raise/lower IRQ lines instead?

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UniPCemu for Android, Windows, PSP, Vita and Switch on itch.io

Reply 1 of 4, by superfury

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Hmmm... What happens if software writes the 8042 output port and the buffer is filled due to incoming data? Or is that prohibited from happening? Can that cause a loss of interrupt?

Author of the UniPCemu emulator.
UniPCemu Git repository
UniPCemu for Android, Windows, PSP, Vita and Switch on itch.io

Reply 2 of 4, by Battler

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- superfury: From what I see in the disassembled and commented IBM AT and PS/2 8042 firmwares on halicery (you need to use the Wayback Machine now since the site is now gone), commands are not processed until IBF is clear (ie. there is no incoming data to be read).

Reply 3 of 4, by superfury

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Battler wrote on 2023-09-18, 18:55:

- superfury: From what I see in the disassembled and commented IBM AT and PS/2 8042 firmwares on halicery (you need to use the Wayback Machine now since the site is now gone), commands are not processed until IBF is clear (ie. there is no incoming data to be read).

OK. Just prevented the input buffer from being handled and emptied while the output buffer is filled with a command to execute. So the CPU needs to read it (lowering it's IRQ) from port 60h before the input buffer starts to be handled during the next 12 clock tick(s) after.

Author of the UniPCemu emulator.
UniPCemu Git repository
UniPCemu for Android, Windows, PSP, Vita and Switch on itch.io

Reply 4 of 4, by Battler

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And it looks like I typo'd above, I meant, until OBF is clear. Basically, there's two conditions for a command to be processed: IBF set and OBF clear, ie. there must be a byte in the input buffer and nothing in the output buffer.