SScorpio wrote on 2022-01-11, 21:41:

pancakepuppy wrote on 2022-01-11, 20:27:

1MB stick works, how fun

Awesome work. Now I wonder if someone will shock the world and release the extremely delayed Pipeline Burst cache module. 😁

That would be shocking!

Some points learned during probing the board and doing research:

• Cache stick power is hardwired to either 3.3V or 5V, the CPU voltage jumpers are not involved. Anywhere there's a 5V net on the backside of the module, there's 3.3V on the front side. You can visually identify a 3.3V vs 5V stick just by the PCB layout this way
• The resistor jumpers on the original modules are most likely for building a half-capacity single bank module with only 4+1 SRAMs instead of 8+1
• BIOS autodetects the amount of cache connected, no straps to deal with
• 5V cache stick can be used with 3.3V CPUs since those CPUs have an absolute maximum voltage on signal pins of Vcc+2.3V or so (and thus will tolerate being driven by the 5V SRAMs.) However, 5V is higher than the absolute maximum that 3.3V SRAM parts are specified to handle on their signal pins so 5V CPU+3.3V cache stick should always be avoided
• Data pins are repeated on both sides of the connector
• Cache control seems to be setup basically the same as SiS496, lack of UM8881 datasheet not a big deal if you want to understand how it operates

Going to clean up the design a little bit more before putting it out there for all to enjoy. Also building up the remainder of my first version boards for selling and will likely build up some of the revised sticks as well. Been a fun little project to jump into.

pancakepuppy wrote on 2022-01-11, 20:27:

https://retro.darkintel.org/Pix/1mbcache_front.jpg https://retro.darkintel.org/Pix/1mbcache_detected.jpg 1MB stick works, how fu […]
Show full quote

1MB stick works, how fun

That's amazing 😁 I would want one 😉

Really nice!!

Can you run Speedsys and post a screenshot?

kixs wrote on 2022-01-11, 22:42:

Can you run Speedsys and post a screenshot?

Certainly, I'll capture speedsys/cachechk/whatever else is of interest once I get home in a few hours.

kixs wrote on 2022-01-11, 22:42:

Can you run Speedsys and post a screenshot?

My memory timing settings

Speedsys

Cachechk

Am386DX-40 wrote on 2021-11-08, 22:29:

Can someone post some benchmarks with and without cache on a 919 with an AMD 5x86 at stock 133 Mhz, or something similar?

My results from Phil’s benchmark pack, no cache -> 256k:
3DBench (faster) 74.2 -> 77.8
Chris’s 3D 640x480: 28.9 -> 28.4
PC Player 640x480: 7.4 -> 7.8
Doom max: 1747 -> 1631 realtics
Quake 640x480: 13.7 -> 14.2 fps

M919 v3.4B/F, AMD 5x86@133MHz, 32 MB RAM, GD5446 PCI

Hi, i just bought an M919 motherboard on ebay for 130€ (still not realizing i pay 130 for some 90' shitty computer 😉, thinking i will buy some cache module later.
Long story short i understand they are not available at reasonable price and i have the soldering tools and skill to build them, I'm ready to make 3 or 4 so i could sell them to you at an affordable price.
The idea is that my work (solder + test the modules) will pay me the material to make one cache for me (PCB + components)

Are you folks with me ?
I think of 256 or 512kb, the 1024 is a little too anachronistic for me, but if it's not really expansive i may do it.

I can´t believe L2 is merely 50% faster tham RAM. Does this apply to all sizes of cache sticks for this mainboard?

majestyk wrote on 2022-01-18, 15:42:

l2_perf.JPG

I can´t believe L2 is merely 50% faster tham RAM. Does this apply to all sizes of cache sticks for this mainboard?

The results look consistent with other cachechk results I've seen for 486DX4s with 33MHz bus. I think the L2 bandwidth follows the internal CPU speed more than the cache module capacity (though I don't have a set of numbers for this, it's what I've been seeing while testing.) I upgraded from the Am486DX4-100 to an Am5x86-133 and got a bump in L2 bandwidth from that. (EDIT: Ran cachechk on 256K, 512K, and 1M sticks and latencies/bandwidths per cache level are identical, the CPU upgrade got me 57% faster L2 vs main memory compared to the 52% of the DX4)

Still haven't run into any stability issues or malfunctions yet, smooth sailing. I'm also trying to half-populate a 1MB module to see if the non-interleaved 512KB configuration is detected+works and if so, check how it compares to the 256KB and 1MB modules.

1+-----------------------+-------+------+------+------+
2|         Test          | No L2 | 256K | 512K |  1M  |
3+-----------------------+-------+------+------+------+
4| 3DBench 1.0c fps      |  74.5 | 78.3 | 78.7 | 78.7 |
5| Chris's 640x480 score |  29.2 | 28.6 | 29.4 | 29.5 |
6| PCPlayer 640x480 fps  |   7.4 |  7.8 |  8.4 |  9.1 |
7| Doom (max) realtics   |  1796 | 1682 | 1653 | 1636 |
8| Quake 640x480 fps     |  13.7 | 14.2 | 14.6 | 15.2 |
9+-----------------------+-------+------+------+------+

Setup: M919 V3.4B/F, Am5x86 at 133MHz, 32MB FPM, Permedia2 PCI. 256KB and 1MB modules are dual bank, 512KB is single bank. Performance ends up right where you'd expect and rearranging the signals for a single bank module worked like I expected (yay)

Sorry to barge in here but I've got to ask: why is the M919 so popular?

It seems like there are more threads about it and projects directed at it than any other single mainboard model ever. Were there just that many of them made? Dirt cheap at time of release? High performance? All of the above?

maxtherabbit wrote on 2022-01-19, 01:59:

Sorry to barge in here but I've got to ask: why is the M919 so popular?

It seems like there are more threads about it and projects directed at it than any other single mainboard model ever. Were there just that many of them made? Dirt cheap at time of release? High performance? All of the above?

It's a board that will run basically any 486 I can find, takes PCI/ISA/VLB cards, and if you add a cache stick it's about as good a 486 board as you can get.
Also seemed like a straightforward low-hanging-fruit kinda PCB project since a friend sent me one of these motherboards for free. Crime of opportunity

I read some historical articles that state this motherboard was ultra cheap at that time thus so popular.

About making cache module i found only PCB for 256k from jerryt74332
I see that pancakepuppy have a 1Mb, but he doesn't say if it has built it himself or not.
I'm not ready to spent hours to design a PCB just to make my old nerdy computer ~10% faster 😉, i'm glad some people already did and share it, big thanks.
I have found on utsource (more reliable than aliexpress?) IS61C256AH-12J at ~1.6$, The PCB on JLPCB are cheap (<1$) but there is engineering fee of >30$ and shipping (20$ for 10 boards).
I think 10 sticks will be the minimum to have them at affordable price (~25$ each including all manufacturing cost and my time, excluding shipping cost to the final user)
To be clear i'm not asking money, the goal is to have one for me and making other owner of M919 happy.
I just want to know if (and maybe how many) peoples are interested to buy these sticks if i make some of them.
I'm not ready to spent 70-80$ to make one stick for me, but i will be glad to make 10 and sold them to have one for me.
I don't want to make hundred of them to sell on ebay at 100$ each neither, at worst if i have spare they will be on ebay at 40-50$ to compensate my time, but only after propose them here.

crazytiti wrote on 2022-01-19, 10:55:

I read some historical articles that state this motherboard was ultra cheap at that time thus so popular. […]
Show full quote

I read some historical articles that state this motherboard was ultra cheap at that time thus so popular.

About making cache module i found only PCB for 256k from jerryt74332
I see that pancakepuppy have a 1Mb, but he doesn't say if it has built it himself or not.
I'm not ready to spent hours to design a PCB just to make my old nerdy computer ~10% faster 😉, i'm glad some people already did and share it, big thanks.
I have found on utsource (more reliable than aliexpress?) IS61C256AH-12J at ~1.6$, The PCB on JLPCB are cheap (<1$) but there is engineering fee of >30$ and shipping (20$ for 10 boards).
I think 10 sticks will be the minimum to have them at affordable price (~25$ each including all manufacturing cost and my time, excluding shipping cost to the final user)
To be clear i'm not asking money, the goal is to have one for me and making other owner of M919 happy.
I just want to know if (and maybe how many) peoples are interested to buy these sticks if i make some of them.
I'm not ready to spent 70-80$ to make one stick for me, but i will be glad to make 10 and sold them to have one for me.
I don't want to make hundred of them to sell on ebay at 100$ each neither, at worst if i have spare they will be on ebay at 40-50$ to compensate my time, but only after propose them here.

Yes, 1MB 3.3V is my module. I made a revision to my board and when I get more boards to verify they still work, I'm putting the kicad files out there. Maybe a couple weeks time and that'll be available for everyone. Will also build up a few for the community's consumption since I'm pretty good at hand soldering these together quickly 😀

pancakepuppy wrote on 2022-01-19, 15:58:

(...)I'm putting the kicad files out there. Maybe a couple weeks time and that'll be available for everyone. Will also build up a few for the community's consumption since I'm pretty good at hand soldering these together quickly 😀

OK thank you, then i will wait to buy one from you 😀
Don't hesitate if i can be of any help.

https://retro.darkintel.org/M919/M919_256K_cleanedup.pdf
Schematic of the original 256K 5V stick with the cache slot fully labeled (as far as I can make it without a chipset datasheet anyways) and the jumper resistor configurations. So far as I could tell, only 5 pins on the cache slot connector go absolutely nowhere.

pancakepuppy wrote on 2022-01-11, 22:34:

That would be shocking! […]
Show full quote

SScorpio wrote on 2022-01-11, 21:41:

pancakepuppy wrote on 2022-01-11, 20:27:

1MB stick works, how fun

Awesome work. Now I wonder if someone will shock the world and release the extremely delayed Pipeline Burst cache module. 😁

That would be shocking!

Some points learned during probing the board and doing research:

• Cache stick power is hardwired to either 3.3V or 5V, the CPU voltage jumpers are not involved. Anywhere there's a 5V net on the backside of the module, there's 3.3V on the front side. You can visually identify a 3.3V vs 5V stick just by the PCB layout this way
• The resistor jumpers on the original modules are most likely for building a half-capacity single bank module with only 4+1 SRAMs instead of 8+1
• BIOS autodetects the amount of cache connected, no straps to deal with
• 5V cache stick can be used with 3.3V CPUs since those CPUs have an absolute maximum voltage on signal pins of Vcc+2.3V or so (and thus will tolerate being driven by the 5V SRAMs.) However, 5V is higher than the absolute maximum that 3.3V SRAM parts are specified to handle on their signal pins so 5V CPU+3.3V cache stick should always be avoided
• Data pins are repeated on both sides of the connector
• Cache control seems to be setup basically the same as SiS496, lack of UM8881 datasheet not a big deal if you want to understand how it operates

Going to clean up the design a little bit more before putting it out there for all to enjoy. Also building up the remainder of my first version boards for selling and will likely build up some of the revised sticks as well. Been a fun little project to jump into.

I'll definitely be interested in one of the modules if available for sale. Let me know when they are ready 😀

Tandy1000TL wrote on 2022-01-23, 14:44:

I'll definitely be interested in one of the modules if available for sale. Let me know when they are ready 😀

WIll do! Still waiting on more PCBs to show up, in the meantime testing continues to go well. Many hours of Super PI and messing around in Windows 95 with no problems. 😀

I bought one of your 256k sticks at the beginning of the month (should have checked this thread first, whoops) and it’s working great so far. A 1MB stick does sound tempting though…

What kind of performance increase do you see in Windows with the bump in cache size?