It took me some time to analyze this 2A5ULT40 BIOS - POST_B procedure. 😉
A lot of calls to supporting subroutines are made here, so I had to look at many different code fragments throughout the BIOS. I also encountered several unfamiliar variables that I had to look up in earlier POST procedures to understand their meaning.
Most of what POST_B does has to do with the RTC and other CMOS registers. So finding a problem with the 82C206 supply makes sense.
My analysis:
1) POST_B starts by checking the RTC’s 1 second pulse, via CMOS register 0Ah bit 7 (RTC update in progress bit). If present, the RTC’s time and date registers are checked for valid values and if invalid, the clock’s time and date are set to a valid value.
When the pulse is absent, the clock is obviously not running and the validity check is simply skipped.
2) Next, the keyboard controller is directly accessed via I/O ports 64h/60h to check for a depressed Insert key. If so, the “Load BIOS defaults” flag is set.
3) Earlier, just after the initial RAM test, the BIOS has setup a stack-frame to house all its variables. POST_B now copies the 128 CMOS registers to the first 128 bytes of this stack-frame to have a CMOS work-copy in RAM.
However, if earlier checks revealed a bad CMOS checksum or power loss of the RTC, or if the Insert key was pressed, the BIOS goes through a lot of code to fill these 128 bytes of the stack-frame with default values.
Obviously, these CMOS values on the stack will be manipulated by later POST procedures or by the user via the BIOS SETUP screens. At the end of POST, the BIOS will write these stack-frame values back into CMOS for use during the next cold boot.
4) Finally, at the end of POST_B, a routine is called that manipulates several chipset registers. As we don’t have the OPTi 571 datasheet, I don’t know what happens here. But comparing this with other Award v4.50G BIOSes, I think it is an early resource setup for PCI devices.
Although I didn’t find any clues for a possible hang in POST_B, a lot depends on the 82C206 Peripheral Controller because, apart from the Real-time Clock Subsystem, it also contains the DMA Subsystem, the Interrupt Controller, and the Counter/Timer Subsystem.
As the video setup is done in POST_D and POST_E puts the first BIOS messages on the screen, a videocard issue should not be a factor in this POST_B hang.
Jan