There is the 430HX design data sheet: http://db.zmitac.aei.polsl.pl/Electronics_Fir … ex/29746702.PDF see pages 3-9 and 3-10
If the 128Mb are double density then they will run slower than 64mb single density....

🤔 okay.

I assume I could test this then by trying 32x8 vs 128x4 (these are combinations that I have at my disposal)

Horun wrote on 2022-06-05, 21:21:

There is the 430HX design data sheet: http://db.zmitac.aei.polsl.pl/Electronics_Fir … ex/29746702.PDF see pages 3-9 and 3-10
If the 128Mb are double density then they will run slower than 64mb single density....

For PS/2 SIMMs, modules with 4MB, 16MB or 64MB have a single /RAS signal. That's the organization that is colloquially called "single-sided", called "single density" in this datasheet, and called "single-rank" by most people that try to avoid the term "single-sided". People want to avoid the term single-sided, because single-rank modules might have chips on both sides. For example, I have seen 64MB parity SIMMs built from 36 64Mx1 chips, having 18 on each side. They are still single-rank modules, because all 36 chips use the same /RAS signals, but they have chips on both sides.

On the other hand, 8MB, 32MB and 128MB modules behave like two 4MB, 16MB or 64MB modules in the same slot, one connected to the first /RAS signal and the second one connected to the secon/RAS signal. These modules are colloquially called "double-sided", are called "double density" in that HX application note oe "dual-rank" by people that want to avoid the term "double-sided". Most "dual-rank" modules have in fact one half on one side of the PCB and one half on the other side. Removing the side that has the chips connected to the second /RAS signal would turn the module into a perfectly working (aside from Presesence Detect information) working module of half the capacity that is in fact only single-sided.

So in case of the OP, whether you use 8 modules of 64MB each or 4 modules of 128MB each, in either case 8 ranks (sets of chips sharing a /RAS signal) are connected to the chipset, so the "5-8 rows of memory" table applies. You should take that table with a grain of salt though, as it is based on some assumptions. In the end, what really matters is the amount of memory chips the chipset is driving. The HX chipset is specified to drive 4 banks without buffer chips if the bank is composed of "x4" chips. As a bank is 36 bits (assuming parity is used), a bank composed of x4 chips consists of 9 chips. So what Intel really means is that the HX chipset is specified to drive 36 chips, but if you add more memory chips, you need buffers (a kind of digital amplifier) to make sure the address signals are strong enough. Whether you have buffers or not is not a property of the PS/2 SIMMs, but of the mainbaord. If a mainboard is specified to use more than 4 ranks and yet allowing x4 chips to be used, it would need to have those buffers that introduce delay and thus slow down memory access no matter how many modules are actually installed.

The take-away is: To stay in spec with Intel's specification, any board with 4 SIMM slots that supports dual-rank (aka double-sided / double-density) SIMMs needs to have those buffers, and is not allowed to use the fast timing, even if 60ns modules are installed. The slower timing would also allow 70ns modules. Most people on VOGONs that deal with maxing out retro hardware don't care about the specs, but try to push their hardware to the limit. So they configure the fast timing in BIOS anyway, even if the load on the address lines is higher than recommended for that timing. If the total number of chips on your 8*64MB setup equals the total number of chips on the 4*128MB setup, chances are high that the same timings work on both configurations.

Great explanation mkarcher and yes I was trying to avoid using "single-sided" as I have some 16Mb simms with chips both sides but are single density/single ranked as you mentioned some are ;p

mkarcher wrote on 2022-06-06, 22:07:

For PS/2 SIMMs, modules with 4MB, 16MB or 64MB have a single /RAS signal. That's the organization that is colloquially called "s […]
Show full quote

Horun wrote on 2022-06-05, 21:21:

There is the 430HX design data sheet: http://db.zmitac.aei.polsl.pl/Electronics_Fir … ex/29746702.PDF see pages 3-9 and 3-10
If the 128Mb are double density then they will run slower than 64mb single density....

For PS/2 SIMMs, modules with 4MB, 16MB or 64MB have a single /RAS signal. That's the organization that is colloquially called "single-sided", called "single density" in this datasheet, and called "single-rank" by most people that try to avoid the term "single-sided". People want to avoid the term single-sided, because single-rank modules might have chips on both sides. For example, I have seen 64MB parity SIMMs built from 36 64Mx1 chips, having 18 on each side. They are still single-rank modules, because all 36 chips use the same /RAS signals, but they have chips on both sides.

On the other hand, 8MB, 32MB and 128MB modules behave like two 4MB, 16MB or 64MB modules in the same slot, one connected to the first /RAS signal and the second one connected to the secon/RAS signal. These modules are colloquially called "double-sided", are called "double density" in that HX application note oe "dual-rank" by people that want to avoid the term "double-sided". Most "dual-rank" modules have in fact one half on one side of the PCB and one half on the other side. Removing the side that has the chips connected to the second /RAS signal would turn the module into a perfectly working (aside from Presesence Detect information) working module of half the capacity that is in fact only single-sided.

So in case of the OP, whether you use 8 modules of 64MB each or 4 modules of 128MB each, in either case 8 ranks (sets of chips sharing a /RAS signal) are connected to the chipset, so the "5-8 rows of memory" table applies. You should take that table with a grain of salt though, as it is based on some assumptions. In the end, what really matters is the amount of memory chips the chipset is driving. The HX chipset is specified to drive 4 banks without buffer chips if the bank is composed of "x4" chips. As a bank is 36 bits (assuming parity is used), a bank composed of x4 chips consists of 9 chips. So what Intel really means is that the HX chipset is specified to drive 36 chips, but if you add more memory chips, you need buffers (a kind of digital amplifier) to make sure the address signals are strong enough. Whether you have buffers or not is not a property of the PS/2 SIMMs, but of the mainbaord. If a mainboard is specified to use more than 4 ranks and yet allowing x4 chips to be used, it would need to have those buffers that introduce delay and thus slow down memory access no matter how many modules are actually installed.

The take-away is: To stay in spec with Intel's specification, any board with 4 SIMM slots that supports dual-rank (aka double-sided / double-density) SIMMs needs to have those buffers, and is not allowed to use the fast timing, even if 60ns modules are installed. The slower timing would also allow 70ns modules. Most people on VOGONs that deal with maxing out retro hardware don't care about the specs, but try to push their hardware to the limit. So they configure the fast timing in BIOS anyway, even if the load on the address lines is higher than recommended for that timing. If the total number of chips on your 8*64MB setup equals the total number of chips on the 4*128MB setup, chances are high that the same timings work on both configurations.

I’m gonna be honest, I kinda need you to dumb that down for me 🤣..

In any case, I ordered some 40ns 64mb x 8 simms did I screw up? Or is that the absolute fastest I can get? (That’s the goal)

Sphere478 wrote on 2022-06-07, 05:53:

I’m gonna be honest, I kinda need you to dumb that down for me 🤣..

In any case, I ordered some 40ns 64mb x 8 simms did I screw up? Or is that the absolute fastest I can get? (That’s the goal)

Running those SIMMs at the highest possible speed offered by the board should work just fine.

Intel didn't even know 40ns SIMMs were a thing at that time, so they couldn't include 40ns timing to the application note. My main point was "128MB * 4" is electrically nearly the same as "64MB * 8", and the details depend on the specific construction of the module, this applies both to 64MB and 128MB module. Less chips on the modules are better. 40ns sounds like a modern SIMM variant. This is good, because newer SIMMs means more modern chips with more bits per chip and thus less total chips. 128MB module built using the same technology as the 64MB modules you ordered will have twice as much chips per module, so the total number of chips stays the same.

mkarcher wrote on 2022-06-07, 06:06:

Sphere478 wrote on 2022-06-07, 05:53:

I’m gonna be honest, I kinda need you to dumb that down for me 🤣..

In any case, I ordered some 40ns 64mb x 8 simms did I screw up? Or is that the absolute fastest I can get? (That’s the goal)

Running those SIMMs at the highest possible speed offered by the board should work just fine.

Intel didn't even know 40ns SIMMs were a thing at that time, so they couldn't include 40ns timing to the application note. My main point was "128MB * 4" is electrically nearly the same as "64MB * 8", and the details depend on the specific construction of the module, this applies both to 64MB and 128MB module. Less chips on the modules are better. 40ns sounds like a modern SIMM variant. This is good, because newer SIMMs means more modern chips with more bits per chip and thus less total chips. 128MB module built using the same technology as the 64MB modules you ordered will have twice as much chips per module, so the total number of chips stays the same.

The 128mb simms I have appear to have the same number of chips as the 64mb units I ordered.

If I can get 40ns 128mb sticks that are twice as dense per chip will that be better? Remember, my max is 512mb so that will leave 4 slots open.

Same amount of banks = same performance. Amount of chips generally means nothing.

Just got the 40ns 64mb simms in the mail. They are 8 chip, single sided. The back side has spots for 8 more. is this the best configuration?

128mb double sided 60ns slot 1
128mb double sided 60ns slot 2
128mb double sided 60ns slot 3
128mb double sided 60ns slot 4

Works

64mb single sided 40ns slot 1
64mb single sided 40ns slot 2
64mb single sided 40ns slot 3
64mb single sided 40ns slot 4
64mb single sided 40ns slot 5
64mb single sided 40ns slot 6
64mb single sided 40ns slot 7
64mb single sided 40ns slot 8

Won’t finish post

64mb single sided 40ns slot 1
64mb single sided 40ns slot 2
64mb single sided 40ns slot 3
64mb single sided 40ns slot 4
64mb single sided 40ns slot 5
64mb single sided 40ns slot 6

Memtest shows thousands of errors.

64mb single sided 40ns slot 1
64mb single sided 40ns slot 2
64mb single sided 40ns slot 3
64mb single sided 40ns slot 4

Works for a while, then errors

Ideas?

I’m guessing I need double sided 64mb sticks?

Could be as simple as a dirty connector when all sticks work in individual pairs in 1+2. Perhaps one of the slots is not playing along. Other idea is simply too many chips for the bus to drive reliably, or perhaps even power delivery related issue.

If the 128MB work with 4 but the 64Mb do not work with 4 I would guess they are either bad or not compatible with your motherboard. I remember way back when some DIMMS were Ok for AMD systems but not for Intel systems, cannot recall exactly why but the "refresh rate" had something to do with it IIRC.

Horun wrote on 2022-06-14, 03:35:

If the 128MB work with 4 but the 64Mb do not work with 4 I would guess they are either bad or not compatible with your motherboard. I remember way back when some DIMMS were Ok for AMD systems but not for Intel systems, cannot recall exactly why but the "refresh rate" had something to do with it IIRC.

Yeah, Idk what’s up with it all but I can’t get 4x64 to work. Maybe I should find some 50ns

mkarcher wrote on 2022-06-07, 06:06:

Sphere478 wrote on 2022-06-07, 05:53:

I’m gonna be honest, I kinda need you to dumb that down for me 🤣..

In any case, I ordered some 40ns 64mb x 8 simms did I screw up? Or is that the absolute fastest I can get? (That’s the goal)

Running those SIMMs at the highest possible speed offered by the board should work just fine.

Intel didn't even know 40ns SIMMs were a thing at that time, so they couldn't include 40ns timing to the application note. My main point was "128MB * 4" is electrically nearly the same as "64MB * 8", and the details depend on the specific construction of the module, this applies both to 64MB and 128MB module. Less chips on the modules are better. 40ns sounds like a modern SIMM variant. This is good, because newer SIMMs means more modern chips with more bits per chip and thus less total chips. 128MB module built using the same technology as the 64MB modules you ordered will have twice as much chips per module, so the total number of chips stays the same.

Per computer shopper 40ns simms have existed a very long time albeit in very limited sizes