Reply 300 of 1106, by georgel
Maelgrum wrote on 2023-10-01, 13:48:Initial SP is 0x80 for 4.04 and 4.05, and 0xC0 for 4.11-4.16 […]
georgel wrote on 2023-10-01, 13:34:What SP are you assuming upon MIDI byte transfer? I will try now the latest attempt of yours.
Initial SP is 0x80 for 4.04 and 4.05, and 0xC0 for 4.11-4.16
So after first call:
0552 LCALL 0c9Estack will be:
C2 - 05 <-- SP
C1 - 55
C0 - xxAfter second call
0CFD LCALL 0c77
0d00 CLR RIstack will be:
C4 - 0D <-- SP
C3 - 00
C2 - 05
C1 - 55
C0 - xx
This is vulnerable. But so far it is difficult to be simulated. There are 5 references to sub_0c77, are you sure the call is from the last one? Where are the entries of the MPU401 init/reset routines?