Running a modern graphics card with those old PCI chipsets proved to be a challenge.

The Matrox G450 main chip is built for the AGP, so it can not be directly connected to the 5V PCI bus in older mainboards. So Matrox decided to put a bridge chip on the G450 PCI. The BIOS I'm currently running on the HOT433 only has limited support for PCI-to-PCI bridges, so I had to fix that. This still didn't make the card work. Most likely, I wouldn't even have needed to fix the PCI BIOS implementation, as the Matrox video BIOS contains its own implementation of the PCI BIOS services instead of relying on the main board BIOS.

The main issue with the Matrox card on this mainboard is the PCI clock divider, though. The POST as implemented in Award BIOS v4.50 and v4.51 does the initial PCI bus scan and resource assignment before anything clock-dependent or CMOS-dependent is applied to the chipset. It thus has to work with very conservative settings. It turns out those settings were overly conservative for the G450: While you seem to be able to access the bridge chip just fine at PCI@16.7 (for FSB33) or PCI@20 (for FSB40), configuration cycles targetting the actual Matrox chip fail most of the time (i.e. writes being ignored and reads being unreliable). I managed to overcome that problem by moving the PCI initialization to a slightly later point in the boot process, just after the FSB clock has been determined, and the appropriate PCI divider has been auto-set by the BIOS. This enables PCI@33 for FSB33, and allowed the BIOS to properly initialize the Matrox card. It still fails at FSB40, though, as the auto-configuration uses PCI@20 for FSB40. A patch that changes the bootup auto-config logic to use 1:1 even at FSB40 made the card also work at 40MHz.

There is a PCI divider option in the CMOS setup, but these chipset options are applied way too late in the boot process. There are basically three kind of CMOS options:

• Early-apply options. They are applied just after PCI initialization (or just before PCI initialization with my patch moving the intialization)
• Autoconfigurable late-apply options. These options are applied when the POST is finished, and the systems tries to boot. A well-known autoconfigurable late-apply option is the L2 cache timing. This is why overly fast L2 timings make the system crash only after the POST is finished.
• Non-autoconfiguratble late-apply options. These options are applied when the POST is finished, but they don't get superseeded by the FSB-dependent auto-configuration table

Note that Award does not support autoconfigurable early-apply options, so If I want the PCI divider to be autoconfigurable, I can't have it early applied enough to have it make the video card work.

Based on the most current (probably unofficial homebrew) BIOS I already modded for mouse support, I did some patches (technobabble follows)

• Allow the BIOS to correctly initialize PCI bridges located behind PCI bridges. Originally, the maximum allowed bus number was 0 during the scan for PCI bridges, so secondary PCI bridges, although supported by the PCI confiuration part of the BIOS were rejected by the lower PCI configuration space access layer.
• Make INT1A support more than one PCI bus. Although the number of PCI busses gets properly patched into the shadow RAM during boot, this number was not consistently used, and any software relying on INT1A / AH=B1 to access the Matrox chip would fail.
• Moved PCI initialization after preliminary clock dependent hardware intialization

to obtain LPCI33.BIN, which sets the PCI divider to 1:1 up to 33MHz FSB. I also made LPCI40, that runs the POST at 1:1 (unil the PCI divider from the advanced chipset setup is applied) up to FSB40.

The BIOS variations are attached to this post.

BTW: It seems that for system stability, a heatsink is required on the PCI-to-AGP bridge chip at 40MHz PCI clock.