VOGONS


S3 Virge DX and GX memory

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Reply 40 of 53, by Stiletto

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Anonymous Coward wrote:
BigDaddyM wrote:
Anonymous Coward wrote:

I'm somewhat confident that the Virge GX2 can support 8MB.

There are only 2MB and 4MB versions. Only VX with memory module can have 8MB 😀

Do you have the datasheets for the GX2? I looked and couldn't find them. If it's true that 4MB was still the max, then that's pretty sad. In 97/98 when this chip was released it would have needed 8MB to be competitive.

Best I can do: http://web.archive.org/web/19980128023605/www … iew/po37gx2.htm

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Reply 41 of 53, by CBM

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I have both DX and GX versions that I used back in the 90s, I did not notice much difference between them, they were great for adding additional monitors to Windows98SE though.

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Reply 42 of 53, by Phido

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There is the Virge technical documents dated from 1996 august and it includes the GX in the copyright.

http://www.bitsavers.org/components/s3/DB019- … tor_Aug1996.pdf

https://github.com/bitrig/bitrig-xenocara/blo … rc/s3v_driver.c
Seems to indicate only 8Mb cards are VX and Trio3D and newer chipsets.

regarding memory there does seem to be some flexibility...

ELSA made a Virge card with VRAM and EDO DRAM 2mb of each..

Reply 43 of 53, by mkarcher

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As I like examining hardware with interesting design, I stumbled across Virge DX cards with 8MB of RAM soldered onto them. One of those cards is owned by forum user Disruptor, another of them is owned by Vlask, and exhibited in the VGA museum. The memory chips on Disruptor's cards are four chips LGS GM71C18163C. The memory chips on Vlask's card are four chips Hyundai HY51V18164B. The design of both cards is quite similar, and rather curious. The memory chips are 1M x 16 in both cases, organized as 1024 rows of 1024 columns of 16 bits each. Simple maths shows you that each of the chip contain 2MB, so all four of these chips contain 8MB total. So there are Virge DX cards with 8MB RAM. Case closed.

No, not so fast! Case reopened! The conclusion of the first paragraph is technically correct, but if that would be the whole story, I wouldn't bother writing a VOGONs post about this kind of card. Let's start with the observation that the VESA BIOS of Disruptor's card only reports 4MB of RAM. The Virge DX (86c375) is basically just a performance-enhanced classic Virge (86c325), and the Virge DX is fully pin compatible to the classic Virge in PCI mode. You can find the full data sheet for the classic Virge chip. I'm not going into rambling about the meaning of "full" is this context, but it most likely is the most complete data sheet for the Virge chip ever published, so I'm going to call it "full". This data sheet explains the memory organization of the Virge: You can have either one or two banks of 2MB each, organized as 256K x 64. You can use two banks of memory in PCI mode only, but this thread is about the Virge DX and Virge GX, which don't support VL mode any more, so let's not bother about it. The adressing scheme is 9 column bits and 9 row bits. The multiplexing between row and column chips is performed inside the Virge chip, so there are just 9 memory address lines (MA0-MA8). You can't address the 1M x 16 chips, which need 10 memory address bits using this scheme.

So basically, one of two cases are possibly: Either I was wrong by claiming that "the Virge DX memory interface is identical to the Virge memory interface", and the Virge DX in fact does support 10 memory address lines (e.g. by optionally repurposing the second "bank enable" pin as a tenth address pin, to support one bank of 8MB). Or the card contains some glue logic to address the bigger chips without the Virge chip knowing about it. The actual situation is: This kind of card contains some glue logic. The card by Vlask I linked has the 74F08 chip clearly visible near the top left corner. Disruptor's card has a SMD logic chip (most likely also a 74F08) below the OTP ROM chip, which is soldered (not in a socket) to the card. That's why I didn't bother taking and posting a picture of Disruptor's card - the one interesting piece on that card is not visible on that card, but clearly visible on Vlask's card.

The card works like this: MA9 (the tenth address pin of the memory chips) is connected to /RAS1 (the second bank enable signal). So MA9 is high the whole cycle when the Virge (DX) tries to address the "first" bank, whereas MA9 is low the whole cycle when the Virge (DX) tries to address the "second" bank. The /RAS1 pin does not change between the row and column addressing phase, so if the Virge chip tries to access the first bank, it gets into the second half of rows and the second half of columns. When the Virge chip tries to access the second bank (it activates, i.e. lowers, /RAS1), it gets into the first half of rows and the first half of columns. At no time, a low column from a high row, or a high column from a low row is addressed. This degrades the usable address range of the chips that contain 2MB per chip to 1MB per chip. And four of those chips make 4MB accessible video RAM. Case closed for good.. If you are curious about the 74F08 chip I mentioned: The Virge chip has a pin to activate the first bank (/RAS0) and a different pin to activate the second bank (/RAS1). But the card only contains one bank of chips that needs to be activated on any memory cycle. And that's where the 74F08 kicks in: It's a "quad AND gate". Let's first forget about the "quad" part: Only one of the four AND gates is used. Now, you need to consider that the bank activation signals are active low. So the signal is high if the bank is not active. When you combine a signal that is high if bank 0 is not active with a signal that is high if bank 1 is not active using an AND gate, you get a signal that is high if bank 0 is not active AND bank 1 is not active, i.e. neither bank is active. So the signal is low is either bank is active, which is exactly what we need to feed into the one bank of RAM chips to activate it (by a signal that is low to activate the chips).

So why would you waste half of the memory? As the cards look like generic OEM cards, most likely are cost optimized, and the conclusion is that cards containing 4 chips of 2MB (1M x 16) were cheaper to build than cards containing 8 chips of 512KB (256K x 16), although you need to supply twice as much memory. This can either be due to 256K getting "uncommon" and more expensive, or due to the PCB being smaller with only 4 memory chips. Having only 4 memory chips also simplifies routing the address and data lines. There is a strong indication that actually routing is the key point: Take a look at the back side of Vlask's card. You find that the back side is mainly ground interrupted by some think traces which are most likely 5V. This a strong indication that this card does not have internal power planes! So using only a single bank of memory enables the card manufacturer to use a 2-layer PCB instead of a 4-layer PCB. A PCB with no internal layers is way cheaper to build than a PCB with internal layers (which is kind-of two two-layer PCBs precisely glued together). So the explanation for that card is: The additional cost for 8MB instead of 4MB of RAM is more than compensate by savings from being able to use a 2-layer PCB.

TL;DR: There are Virge DX cards in the wild that contain 8MB of memory. The Virge DX chip is unable to address 8MB of memory. Some clever circuits on the card pack 2 banks of 2MB into the 8MB, not using half of the chips using only 50% of the memory in each individual chip. The reason for those card to exist is most likely due to manufacturing costs.

EDIT: clarified statement in the TL;DR.

Last edited by mkarcher on 2024-05-09, 07:15. Edited 3 times in total.

Reply 44 of 53, by feipoa

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A very well written analysis. Thank you very much. This may help explain the anomaly of unusable RAM on other graphics cards as well.

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Reply 45 of 53, by Anonymous Coward

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Another explanation could be that the chips used are half defective. A few years back I found some Trident 9000i cards like this.

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Reply 46 of 53, by Putas

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mkarcher wrote on 2021-12-11, 20:22:

Some clever circuits on the card pack 2 banks of 2MB into the 8MB, not using half of the chips.

Not using half of the chips would halve the bandwidth as well.

Reply 47 of 53, by mkarcher

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Putas wrote on 2021-12-20, 15:32:
mkarcher wrote on 2021-12-11, 20:22:

Some clever circuits on the card pack 2 banks of 2MB into the 8MB, not using half of the chips.

Not using half of the chips would halve the bandwidth as well.

I wasn't clear enough. I didn't intend to say that two of the four chips are not used (although I can clearly see how the quote seems to say that). I intended to say that all four chips are used, but only 50% of the memory in each chip is used.

Reply 48 of 53, by W.x.

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Just found S3 Virge DX with 4 memory chips that looks like SGRAM. core is not seen, as it has Octek sticker on it (I will not remove it). But on BIOS chip is S3 Virge DX sticker.
I was also shocked, expected it to be Virge GX.

So, obviously, chip Virge DX can be used with SGRAM, question is, if it knows to use any of their special function. Because, I've read somewhere, that only GX chip can properly address it. I try to find out more information, but heard, when SGRAM chips are used with Virge DX chip, that it's actually SLOWER than when EDO is used, on same frequency. Will probably do my own tests, as I have also EDO versions of Virge DX. Unfortunatelly, I don't have any card with Virge GX chips, to compare results of chip DX and GX with SGRAM on same frequency.

Anyway, my card is HIS. But with Octek sticker on S3 chip.

To the 8MB memory chips (total) on Virge DX. Yes, it's possible, I have also such card. But, Virge DX cannot address more than 4MB. So, it can be seen on card, that it has 8MB, but it uses only 4 MB of it... rest of 4MB is never used. Not sure, why it happened, my theory is, in later stage, when EDO became ultra-cheap, they just didn't bother to use 512KB chips, but used 2MB chips, x4 (4 pieces), when they had unused supply of them.
https://www.alldatasheet.com/view_datasheet.j … E5DJ-6&sField=3

Reply 49 of 53, by W.x.

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Just found comparsion between S3 Virge DX with EDO RAM and SGRAM RAM. But from external source.
The test system seems same, but only application, that is shared between two, is Final Reality benchmark.

https://www.clous.cz/s3-virge-dx-sgram/
https://www.clous.cz/hercules-terminator-3d-dx/

Seems, SGRAM version is indeed MUCH faster, even on Virge DX core. But seems, he has mistake in specs... he mentioned, Hercules has SDRAM. But it has EDO RAM.
Maybe I remember it wrong, that SGRAM and DX are slower on same clock than EDO. Anyway, more complex tests would be needed.

Reply 50 of 53, by mkarcher

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W.x. wrote on 2024-07-18, 19:42:

The card on that web site has Mosel Vitelic V53C832HQ35 chips mounted. Obviously, those chips look completely different than the typical SOJ40 256K x 16 EDO chips or SOJ42 1M x 16 EDO chips. The chips are in 100-pin PQFP, and you can find common SGRAM chips, e.g. the Samsung K4G163222A 256K x 32 x 2 bank SGRAM chip in the same case. But this does not mean that any RAM chip in that case is SGRAM!. Actually, the technology (EDO vs. SGRAM) doesn't really influence the best package to use, it's just about the pin count. RAMs with 16 bit bus width require less than 50 pins are a perfect for SOJ. On the other hand RAMs with 32 bit bus width require a lot more pins, so they are packaged in quad flat pack instead. The Mosel Vitelic chip is, according to its data sheet, a "High Performance 256K x 32 EDO Page Mode CMOS Dynamc RAM". This is not SGRAM, and it is very unlikely that the ViRGE/DX actually supports SGRAM.

There are ViRGE/DX cards with vastly different speeds. They differ in the core clock set up by the BIOS, the use of a single-clock or two-clock burst speed, and the wait states on opening and closing pages. But they don't differ in memory type.

Reply 51 of 53, by Yftul

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mkarcher wrote on 2024-07-18, 20:55:

The card on that web site has Mosel Vitelic V53C832HQ35 chips mounted. Obviously, those chips look completely different than the typical SOJ40 256K x 16 EDO chips or SOJ42 1M x 16 EDO chips. The chips are in 100-pin PQFP, and you can find common SGRAM chips, e.g. the Samsung K4G163222A 256K x 32 x 2 bank SGRAM chip in the same case. But this does not mean that any RAM chip in that case is SGRAM!. Actually, the technology (EDO vs. SGRAM) doesn't really influence the best package to use, it's just about the pin count. RAMs with 16 bit bus width require less than 50 pins are a perfect for SOJ. On the other hand RAMs with 32 bit bus width require a lot more pins, so they are packaged in quad flat pack instead. The Mosel Vitelic chip is, according to its data sheet, a "High Performance 256K x 32 EDO Page Mode CMOS Dynamc RAM". This is not SGRAM, and it is very unlikely that the ViRGE/DX actually supports SGRAM.

Virge with combo ic's onboard.

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Reply 52 of 53, by mkarcher

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Yftul wrote on 2025-04-08, 07:36:

Virge with combo ic's onboard.

Which is a very nice demonstration that each of those bigger PQFP chips just behaves like two of the more well-known EDO chips in the SOJ package. Thanks for posting that image.

Reply 53 of 53, by W.x.

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Yeah, i've already found out several days after last post in july 2024, that Virge DX doesn't support SGRAM memory (did some research after), so it can be only EDO memory (but in different, 32-bit wide, package).

Yes, that's why only 2 chips are needed to saturate 64-bit memory bus.

It's Virge GX, that was updated in core, so it can support SGRAM memory (although, there are versions with EDO memory too, as it kept backward compatibility)

I've solved this issue in several other topics, where it was found , that those are not SGRAM, but EDO memory, in different package ( SGRAM usually have this one, so people tend to confuse them.)
but didn't update this one. And of course, this one is necroed because of that.