I picked up what appeared to be genuine ones of these off ebay a few years ago with the eventual intent of wiring up a pin adapter to a 286 socket. (ie use a 68-pin PGA socket in a 286 motherboard, either stock or modified, wire up an adapter board with a PLLC68 socket in it and install the V33) But I haven't done anything of the sort yet.
They don't use the 286 pinout for some reason, even though they easily could, maybe it was paranoia over the lawsuit over the V20/V30, but that seems excessive given it was over microcode copyright and not CPU or pin compatibility. (it also wasn't really used outside of Japan, except maybe in its microcontroller variants)
It's just my own scrutiny of the chips that I'm fairly confident they haven't been relabeled random crap (as they came from China as old surplus). There's a variety of obvious and subtle details that point to re-marking (including re-marking chips that are at least the correct type ... also re-tinning pins: the latter sometimes weakens them due to solder migration into the copper legs), including numerous cases that pass the "acetone test" and these look legit to me. (they also looked like old stock, not super cleaned up or retinned)
I also found more info via some of NEC's old databooks on bitsavers or archive.org ... I worked out the release date (for commercial availability) that way, too, though I forget if it was '89 or 90.
One thing I'm not sure of is the high memory area is accessible or not. It definitely doesn't do protected mode, but does have a 24 bit external address space, so that quirk of the 8086's addressing is a bit of an unknown.
What is quite interesting is what it does actually do with its 24-bit address space: it's got built-in LIM EMS 4.0 compatible memory paging (EMS bank-switching), so it hypothetically could be plugged into a 286 motherboard with chipset lacking EMS support (only 286 extended memory support) and use compatible drivers to implement EMS. (not sure of any drivers out there, but ... it's hypothetically possible)
Otherwise it's faster on a few instructions than the 286 (though the 286 already does a lot in just 3 cycles, and I think very few things in just 2 cycles ... the latter is a sore spot for achieving true 0ws memory), but among those is a fast hardware multiplier with 8 cycle 8-bit multiply and 12 cycle 16-bit multiply ... I thin divide is 24 cycles. (I'd have to find the document again to be sure, but they're definitely all fixed cycle times via a hardware multiply and divide implementation)
It would be relatively fast for software rendered 3D or anything else mul/div heavy that actually uses multiply and divide instructions rather than shifts and adds or look-up tables. I'm not sure how common the former case is since the 286 has both pretty decent hardware multiply and divide times for its day, but also a barrel shifter and fast memory access, so all three options are possible. (though given the wait states many 286 systems had, and lack of cache except for extremely unusual cases, the look-up table option has significant drawbacks)
On a side-note, the 2 cycle vs 3 cycle instruction execution times of the 286 (and 2 cycle memory time at true 0ws) is probably why some motherboards/chipsets give intermittent or inconsistent results for wait-state benchmarks, particularly the PCChips/Hedaka/Citygate one that will randomly give 0 vs 1 ws if you try it multiple times. I'm assuming that chipset manages to have a 2-clock-tick access time (so 0ws access) but 3-tick minimum memory cycle time, and is basic with only random read/write cycle and no page-mode or bank interleave support. So it would appear as 0ws in all cases except for the fastest instructions and a few cases of allignment overhead.
Either that, or I'm overthinking it, and that chipset just has a lot of overhead for refresh time, so most of the 1ws cases are for refresh cycles. (since it almost certainly doesn't have fast, smart, or hidden refresh)
It does very, very clearly tolerate slower rated DRAM chips at a given clock speed, but run faster than true 1ws options on other chipsets.