Wonderful idea and project! Kudos! 🙂💙

Did you come across the "DUPAL" project?

https://github.com/DuPAL-PAL-DUmper

They also have a layout for a small PCB with the most common PAL / GAL sockets.

I also support the idea of creating a how to and FAQ here so everybody can dump their PALs / GALS here just like in the BIOS threads.
At the moment I have 5 PALs waiting to be cloned to complete mainboards that have missing PALs.

majestyk wrote on 2024-02-25, 20:44:

Did you come across the "DUPAL" project? […]
Show full quote

Did you come across the "DUPAL" project?

https://github.com/DuPAL-PAL-DUmper

They also have a layout for a small PCB with the most common PAL / GAL sockets.

I also support the idea of creating a how to and FAQ here so everybody can dump their PALs / GALS here just like in the BIOS threads.
At the moment I have 5 PALs waiting to be cloned to complete mainboards that have missing PALs.

Yes, I’ve seen this project but to me it seemed more demanding: you have to print PCB, wait for shipping, collect a whole BOM of parts, solder everything together and at the end you get the tool based on popular but not optimal MCU. I can’t evaluate the performance of that project without trying it but since it’s based on the same 8-bit AVR MCU family as Arduino boards, I think using Arduino as a cheap open platform makes it easier to implement for an enthusiast not so experienced in buying and soldering electronic stuff.

As for the FAQ, I think I’ll do something later. I just finished writing yesterday and had no much time for documenting in details.

The project page contains a short list of requirements and brief workflow but I think I can write a tutorial. The main difficulty with that is that I’m no so bad with coding but quite clumsy with writing long texts in English.

The code was updated to version 1.3. Works stable with PAL16L8.

It should support PAL20L8 as well, but all 3 chips I have to test are either registered or give doubtful results due to feedbacks (Paradise EGA board). Probably, in order to correclty support feedback configurations in auto mode, this board will need couple of 4066 and one 4051 chips, or couple of 74138 and ULN2003 because the only way to detect feedbacks is shorting outputs to gnd and Vcc to override their own output. That's not a perfect way to deal with digital IC but at least it allows to detect existence of feedback and treat feedback inputs as independent in the truth table.

I've uploaded a little collection of pld/jed files confirmed to work along with dump files in folder PAL Database at the project page on Github.
TODO: upload a normal schematic, upload images of dumped boards and improve support for PAL20 or at least confirm support for combinatorial configurations without feedbacks. Will try the latter later when I get an ATF22V10 IC to brew my own test chips.
Also, I'm going to add the limited support for Arduino UNO and other MEGA328-based boards.

A few updates to PAL Database:
1. MB Hyundai Super-16V Clone
2. VGA OTI037C_1037162003_REV_A
3. VGA OTI037C_1037164002_REV_D
4. VGA OTI037C_Hedaka_HED-622

All four has properly named pins in source files, so I even found an interesting additional use of this tool: a simple modification allowed to disable internal FDD controller for SUper-16V XT-clone motherboard, which though has no practical use because its BIOS doesn't support high density drives, so there's no big difference in using buit-in or ISA FDD card.

So, currently database contain 12 tested boards with .jed files.
Interesting thing: Today I found a VGA card, OTIVGA revision D, which appeared similar to my Hedaka HED-622 which initially made me start this project. To my great satisfaction, the dump I got appeared completely pin to pin and equation to equation identical to the one I've redesigned made using reverse engineering.

rpocc wrote on 2024-02-25, 12:51:

Hi to all. Today I would like to introduce here my complete Arduino project: PALDump, version 1.0 1.3 […]
Show full quote

Hi to all.
Today I would like to introduce here my complete Arduino project: PALDump, version 1.0 1.3

Couple of weeks ago I was trying to revive one of my VGA cards, specifically Hedaka OTIVGA, which I've obtained with one of its PAL chips pulled off. I was struggling searching for an easy to build PAL dumper and to my surprise I coudn't find any related project based on Arduino board. Some PAL-related topics were discussed even here, on Vogons, but neither of them seemed to be simple enough to build with basic DIY tools. So, I've started developing one from scratch and made it to the first working release which I've decided to make public.

It uses Arduino MEGA-2560 mainly due up to 23 needed pins while Uno and other MEGA328-based modules have only 19 (including one shared with Serial RX) which barely enough for PAL16L8 and not enough for PAL20L8.

I've been trying to get a pal20l8 dumped for another Vogons member here - Some help with one interesting multifunction card (Multitech PC500+ II VIO) . Just straight up reading it with a Dataman was a no go, so I'm wondering if it might be either secured or combinatorial.

I was looking at your github, but the photo showing the Arduino connections wasn't clear to me. I have a MEGA-2560 and all the breadboard components. Could you assist me in setting it up for my pal20l8 chip?

retrotechrestoration wrote on 2024-06-11, 18:31:

I've been trying to get a pal20l8 dumped for another Vogons member here - Some help with one interesting multifunction card (Multitech PC500+ II VIO) . Just straight up reading it with a Dataman was a no go, so I'm wondering if it might be either secured or combinatorial.

I was looking at your github, but the photo showing the Arduino connections wasn't clear to me. I have a MEGA-2560 and all the breadboard components. Could you assist me in setting it up for my pal20l8 chip?

Have you tried looking into paldump.h? There is a list of connections in the commentary, where all pins of PAL chips are associated with respective MEGA2560 pins. The only sheet you may need to have in addition is detailed pinout with all MCU ports associated with Arduino pin numbering. Let me know if you need additional explanation, because currently I didn't make a clear picture of schematic of connections.

rpocc wrote on 2024-06-12, 05:57:

retrotechrestoration wrote on 2024-06-11, 18:31:

I've been trying to get a pal20l8 dumped for another Vogons member here - Some help with one interesting multifunction card (Multitech PC500+ II VIO) . Just straight up reading it with a Dataman was a no go, so I'm wondering if it might be either secured or combinatorial.

I was looking at your github, but the photo showing the Arduino connections wasn't clear to me. I have a MEGA-2560 and all the breadboard components. Could you assist me in setting it up for my pal20l8 chip?

Have you tried looking into paldump.h? There is a list of connections in the commentary, where all pins of PAL chips are associated with respective MEGA2560 pins. The only sheet you may need to have in addition is detailed pinout with all MCU ports associated with Arduino pin numbering. Let me know if you need additional explanation, because currently I didn't make a clear picture of schematic of connections.

Yes, I've looked at those diagrams. I'm not sure what you're referring to by Port 1 and Port 2, etc... the code references port G, but in the photo it looks like you're using just port A.

retrotechrestoration wrote on 2024-06-12, 12:28:

Yes, I've looked at those diagrams. I'm not sure what you're referring to by Port 1 and Port 2, etc... the code references port G, but in the photo it looks like you're using just port A.

Sorry for being out for so long. I got it, yes it's a bit cryptic.
Ports 1, 2, 3 are defined in the .ino project file since you may want to redefine which ports you're using (eg for other AVR platform or in conjunction with other functions such as display, etc). In my sketch for 2560 it's A, C and K.

1#define GLOBAL_PORT1 PORTA
2#define GLOBAL_PORT2 PORTC
3#define GLOBAL_PORT3 PORTK

Further, in the same file an instance of the class in constructed using these three entities passed as arguments

1PALDump PLA(globalPALType, &GLOBAL_PORT1, &GLOBAL_PORT2, &GLOBAL_PORT3, 1);

Hi here.

Glad to hear that such a project is underway.
I have some PAL16L8 I'd like to dump. (oldschool computer interface)
I have already try to dump them with interfaces available on the net (ex : duPal) without success.
Of course, they are protected against reading.

I'm going to follow this project closely and why not participate when it's stable.

See You

retrotechrestoration wrote on 2024-06-11, 18:31:

I've been trying to get a pal20l8 dumped for another Vogons member here - Some help with one interesting multifunction card (Multitech PC500+ II VIO) . Just straight up reading it with a Dataman was a no go, so I'm wondering if it might be either secured or combinatorial.

I was looking at your github, but the photo showing the Arduino connections wasn't clear to me. I have a MEGA-2560 and all the breadboard components. Could you assist me in setting it up for my pal20l8 chip?

And I hope you manage to read it. I'll keep waiting for it
Once I have it I'll have to take it to a GAL20V, which are the ones I have available for now.

kinetix wrote on 2024-09-13, 19:25:

And I hope you manage to read it. I'll keep waiting for it
Once I have it I'll have to take it to a GAL22V, which are the ones I have available for now. I'll have to make some kind of adapter, in addition to setting the unused inputs to 0 (or 1)

Look at my last comment here. The ports are assigned in the main file, in defines.

retrotechrestoration wrote on 2024-06-11, 18:31:

I've been trying to get a pal20l8 dumped for another Vogons member here - Some help with one interesting multifunction card (Multitech PC500+ II VIO) . Just straight up reading it with a Dataman was a no go, so I'm wondering if it might be either secured or combinatorial.

I was looking at your github, but the photo showing the Arduino connections wasn't clear to me. I have a MEGA-2560 and all the breadboard components. Could you assist me in setting it up for my pal20l8 chip?

Hi. Any luck with the PAL?
I've been looking into how it's connected, to see if it's really possible to replace it with one of the kind of equivalent GALs I have, so far it seems that it is. All the missing components have been restored and everything has been polished, only the PAL is missing.
I asked the guys at theretroweb for help, so they could ask the person who helped them with this card, and it seems that it's someone on their team, but I have to remind them.
I was hoping for at least a truth table, of the outputs for all combinations of inputs, from there on things can be done.

Hi Using your solution I read the truth table from the PAL16v8 chip, then I used "Espresso Logic Minimizer" and I got stuck. I don't really understand how I can now get the logical conditions to recreate the code. I used "Espresso Logic Minimizer online" I had a problem running the local version. I would like some advice on how to move forward.
.i 10
.o 6
.ilb p15 p14 p11 p9 p7 p6 p5 p3 p2 p1
.ob p19 p18 p17 p16 p13 p12
#.phase 000000
.p 10
--0------0 000010
0---0----- 000001
-0--1----- 000001
-------0-1 100000
---0---0-- 100000
--------01 010000
---0----0- 010000
------0--1 001000
---0--0--- 001000
-----0---- 000100
.e

Adriand1281 wrote on 2024-12-23, 16:30:

Hi Using your solution I read the truth table from the PAL16v8 chip, then I used "Espresso Logic Minimizer" and I got stuck. I don't really understand how I can now get the logical conditions to recreate the code. I used "Espresso Logic Minimizer online" I had a problem running the local version. I would like some advice on how to move forward.

The original utility has command line parameters determining the form of its output.

Usually I just use bat file with the followng commands: (I just drag and drop the file containing the dumped truth table into this bat file having espresso.exe in the same directory)

1espresso -Dexact -Dmany -o eqntott %1 > %1.eqn.txt
2espresso -Dexact -Dmany %1 > %1.min.txt

The first file converts the truth table to equations, and seconds outputs minimized truth table which looks like yours.

This command file gave me this result, which can be used as equation section in a pld file with some miniscule edits. (character "|" is replaced with "#" and all equations are wrapped into "!()" due to negative phase at all outputs)

1#.phase 000000
2p19 = (!p3&p1) | (!p9&!p3);
3p18 = (!p2&p1) | (!p9&!p2);
4p17 = (!p5&p1) | (!p9&!p5);
5p16 = (!p6);
6p13 = (!p11&!p1);
7p12 = (!p15&!p7) | (!p14&p7);

Let's take a closer look at your file to understand the logic:

1.i 10
2.o 6
3.ilb p15 p14 p11 p9 p7 p6 p5 p3 p2 p1
4.ob p19 p18 p17 p16 p13 p12

The first two lines tell that your chip has effectively 10 inputs and 6 outputs; some of pins are just not used.
Next two lines defines names for these I/O and were automatically named by serial output of my code.

1#.phase 000000
2.p 10

.Phase derictive tells that outputs are active low, which is important because that means that output inverters should be active for each output. Most of the time PALs are programmed exactly this way: the most short equation turns outputs low state, any other case — high state.
IIRC, the .p directive determines the number of entries containing minimized truth table: there are exactly 10 lines in your output.

1--0------0 000010

Look at the active bits at the right part and non-dashed bits at the left part: there are two input pins which state being LOW affects the 5th output, so when they are LOW, the output will be active, e.g. as well, LOW. Other times it's HIGH, so it can be expressed with the following logical equation: p13 = !(!p11&!p1);
That means that pin 13 is negated ((negated pin11) and (negated pin1)). In C language this would look like p11 = !((!p11)&(!p1))

Next two lines:

10---0----- 000001
2-0--1----- 000001

There are two entries which turn output 6 to the active state, so this translates to two ORed clauses: p12 = !((!p15&!p7) # (!p14&p7));
(in CUPL # is the same as | in C: OR operator)

Other lines work the same way.

The working pld file which can be compiled in WinCUPL should look something like this:

1Name     DEVICE_NAME ;
2PartNo   00 ;
3Date     24.12.2024 ;
4Revision 01 ;
5Designer Your Name ;
6Company  Your Company ;
7Assembly None ;
8Location  ;
9Device   G16V8MA ;
10
11PIN 1 = p1;
12PIN 2 = p2;
13PIN 3 = p3;
14PIN 4 = p4;
15PIN 5 = p5;
16PIN 6 = p6;
17PIN 7 = p7;
18PIN 8 = p8;
19PIN 9 = p9;
20
21PIN 12 = p12;
22PIN 13 = p13;
23PIN 16 = p16;
24PIN 17 = p17;
25PIN 18 = p18;
26PIN 19 = p19;
27
28p19 = !((!p3&p1) # (!p9&!p3));
29p18 = !((!p2&p1) # (!p9&!p2));
30p17 = !((!p5&p1) # (!p9&!p5));
31p16 = !(!p6);
32p13 = !(!p11&!p1);
33p12 = !((!p15&!p7) # (!p14&p7));

So, with Atmel WinCUPL you can create a project, insert this code into it and compile the JED file for the specified device, which later can be programmed into suitable GAL or ATF chip with TL866 or other suitable programmer.

Hope, that will help you and also will work as a tutorial for similar questions on this subject.

Good luck with cloning your PAL!

rpocc wrote on 2024-03-16, 15:52:

2. VGA OTI037C_1037162003_REV_A
3. VGA OTI037C_1037164002_REV_D
4. VGA OTI037C_Hedaka_HED-622

Wow, OTI 037C. Don't you have card with tow 16v8 cards? Some help here could be needed: Oak Technology VGA-16 (OTI-037C based mda/cga/ega/vga) video card schematics?

Even if you have one - seems like second PAL on our boards is for managing the 8/16 bit BIOS reads so for the second one the code should be pretty same.

Could you help please with jed-files (I suppose I can convert them back to equations) and probably pinouts of your cards?

rkurbatov wrote on 2024-12-23, 21:49:

Wow, OTI 037C. Don't you have card with tow 16v8 cards? Some help here could be needed: Oak Technology VGA-16 (OTI-037C based md […]
Show full quote

rpocc wrote on 2024-03-16, 15:52:

2. VGA OTI037C_1037162003_REV_A
3. VGA OTI037C_1037164002_REV_D
4. VGA OTI037C_Hedaka_HED-622

Wow, OTI 037C. Don't you have card with tow 16v8 cards? Some help here could be needed: Oak Technology VGA-16 (OTI-037C based mda/cga/ega/vga) video card schematics?

Even if you have one - seems like second PAL on our boards is for managing the 8/16 bit BIOS reads so for the second one the code should be pretty same.

Could you help please with jed-files (I suppose I can convert them back to equations) and probably pinouts of your cards?

According to the pinout provided by Strakh, your boards have PALs, identical to my Hedaka (the particular IC is U8 U9! on mine)

All necessary PLD and JED files are provided here:
https://github.com/rpocc/PALDump/tree/8787c80 … _Hedaka_HED-622

rpocc wrote on 2024-12-23, 21:34:

The original utility has command line parameters determining the form of its output. […]
Show full quote

Adriand1281 wrote on 2024-12-23, 16:30:

Hi Using your solution I read the truth table from the PAL16v8 chip, then I used "Espresso Logic Minimizer" and I got stuck. I don't really understand how I can now get the logical conditions to recreate the code. I used "Espresso Logic Minimizer online" I had a problem running the local version. I would like some advice on how to move forward.

The original utility has command line parameters determining the form of its output.

Usually I just use bat file with the followng commands: (I just drag and drop the file containing the dumped truth table into this bat file having espresso.exe in the same directory)

Copy code to clipboard

1espresso -Dexact -Dmany -o eqntott %1 > %1.eqn.txt
2espresso -Dexact -Dmany %1 > %1.min.txt

The first file converts the truth table to equations, and seconds outputs minimized truth table which looks like yours.

This command file gave me this result, which can be used as equation section in a pld file with some miniscule edits. (character "|" is replaced with "#" and all equations are wrapped into "!()" due to negative phase at all outputs)

Copy code to clipboard

1#.phase 000000
2p19 = (!p3&p1) | (!p9&!p3);
3p18 = (!p2&p1) | (!p9&!p2);
4p17 = (!p5&p1) | (!p9&!p5);
5p16 = (!p6);
6p13 = (!p11&!p1);
7p12 = (!p15&!p7) | (!p14&p7);

Let's take a closer look at your file to understand the logic:

Copy code to clipboard

1.i 10
2.o 6
3.ilb p15 p14 p11 p9 p7 p6 p5 p3 p2 p1
4.ob p19 p18 p17 p16 p13 p12

The first two lines tell that your chip has effectively 10 inputs and 6 outputs; some of pins are just not used.
Next two lines defines names for these I/O and were automatically named by serial output of my code.

Copy code to clipboard

1#.phase 000000
2.p 10

.Phase derictive tells that outputs are active low, which is important because that means that output inverters should be active for each output. Most of the time PALs are programmed exactly this way: the most short equation turns outputs low state, any other case — high state.
IIRC, the .p directive determines the number of entries containing minimized truth table: there are exactly 10 lines in your output.

Copy code to clipboard

1--0------0 000010

Look at the active bits at the right part and non-dashed bits at the left part: there are two input pins which state being LOW affects the 5th output, so when they are LOW, the output will be active, e.g. as well, LOW. Other times it's HIGH, so it can be expressed with the following logical equation: p13 = !(!p11&!p1);
That means that pin 13 is negated ((negated pin11) and (negated pin1)). In C language this would look like p11 = !((!p11)&(!p1))

Next two lines:

Copy code to clipboard

10---0----- 000001
2-0--1----- 000001

There are two entries which turn output 6 to the active state, so this translates to two ORed clauses: p12 = !((!p15&!p7) # (!p14&p7));
(in CUPL # is the same as | in C: OR operator)

Other lines work the same way.

The working pld file which can be compiled in WinCUPL should look something like this:

Copy code to clipboard

1Name     DEVICE_NAME ;
2PartNo   00 ;
3Date     24.12.2024 ;
4Revision 01 ;
5Designer Your Name ;
6Company  Your Company ;
7Assembly None ;
8Location  ;
9Device   G16V8MA ;
10
11PIN 1 = p1;
12PIN 2 = p2;
13PIN 3 = p3;
14PIN 4 = p4;
15PIN 5 = p5;
16PIN 6 = p6;
17PIN 7 = p7;
18PIN 8 = p8;
19PIN 9 = p9;
20
21PIN 12 = p12;
22PIN 13 = p13;
23PIN 16 = p16;
24PIN 17 = p17;
25PIN 18 = p18;
26PIN 19 = p19;
27
28p19 = !((!p3&p1) # (!p9&!p3));
29p18 = !((!p2&p1) # (!p9&!p2));
30p17 = !((!p5&p1) # (!p9&!p5));
31p16 = !(!p6);
32p13 = !(!p11&!p1);
33p12 = !((!p15&!p7) # (!p14&p7));

So, with Atmel WinCUPL you can create a project, insert this code into it and compile the JED file for the specified device, which later can be programmed into suitable GAL or ATF chip with TL866 or other suitable programmer.

Hope, that will help you and also will work as a tutorial for similar questions on this subject.

Good luck with cloning your PAL!

Thank you for your answer.

It clarified a lot for me. I compiled the shared code. I only added "declarations" of pins 11 14 15, the compiler required it.

Unfortunately, the truth table readings for the programmed system differ from the original. I am attaching the original and the read batch from the programmed system.

I also have a request for a link to the working "Espresso" program. I probably won't be able to move forward without it.

I also absolutely do not understand why during reading PIN 2
(p2) is recognized as "doesn't matter", and PIN 4(p4), which is not even declared in the program, is "OK".

rpocc wrote on 2024-12-24, 00:22:

According to the pinout provided by Strakh, your boards have PALs, identical to my Hedaka (the particular IC is U8 on mine)

All necessary PLD and JED files are provided here:
https://github.com/rpocc/PALDump/tree/8787c80 … _Hedaka_HED-622

Thank you very much!