So it is stable when you use 32MB simms in banks 0,2 & 3 and stable when you use 32MB simms in banks 1,2,&3 , but not stable when you use 32MB simms in banks 0,1,2, & 3 ?

Did I get that right?

Maybe there's a short between banks 0 & 1 but it seems like the simplest explanation is the electrical load is just too high for the old capacitors.

douglar wrote on 2024-08-29, 18:42:

So it is stable when you use 32MB simms in banks 0,2 & 3 and stable when you use 32MB simms in banks 1,2,&3 , but not stable when you use 32MB simms in banks 0,1,2, & 3 ?

pentiums take SIMMs in pairs, consequently the manual names bank A and B, two sockets for each. i understand OP has already tried populating just one bank.

my thought is, even though it's not mentioned in the manual, maybe 128 mb is only stable with buffered SIMMs? the question is whether they tested 128 mb, and how a 32 mb module would look in march 1994 (the date of the rev 2.0 manual of the board). largest i have seen from 1994 is 16mb and these are quite large and packed with chips. these probably already cost a fortune at the time, because even pentium systems mostly came with 8mb total. so my guess is the 32 mb modules would have been buffered.

the 430LX northbridge specsheet does not seem to differentiate though, unlike the 440BX for instance, where 1 GB is only said to work as registered. anyway, i'm not sure the more integrated 32 mb modules already existed in 1994 - maybe as engineering samples. otherwise, the 128 mb support would have been untested, or tested with buffered modules. you can even assume 1993, because the original batman board has the exact same 128 mb mentioned in its manual.

If you have a pair of 64mb simms laying around it would be interesting to test.

I honestly never knew that parity as a requirement was still a thing with p60, the one I had normal non-parity.

A common issue on old boards are “bad” unused simm sockets, might be a bit of coorsion or some other type of damage .

In so far as buffered FPM Ram I never saw that on Intel systems until after the 430lx was obsolete

the only requirement with parity is that you can't put a parity and non-parity module in the same bank, otherwise you can even run parity in one bank and non-parity in the other bank. and since OP asked about it, i'm pretty sure boards can't sense if a SIMM is 60ns or 70ns - it just won't use the faster timings to take advantage of 60ns. also, two 64 mb SIMMs is not listed as a valid combination, only four 32 mb (each 8Mx36).

i'd have suggested to test each bank individually with memtest, but OP did mention swapping out sticks and not seeing issues otherwise. but might be still worth trying just to rule any other issue out.

auron wrote on 2024-08-30, 18:29:

the only requirement with parity is that you can't put a parity and non-parity module in the same bank, otherwise you can even run parity in one bank and non-parity in the other bank. and since OP asked about it, i'm pretty sure boards can't sense if a SIMM is 60ns or 70ns - it just won't use the faster timings to take advantage of 60ns. also, two 64 mb SIMMs is not listed as a valid combination, only four 32 mb (each 8Mx36).

i'd have suggested to test each bank individually with memtest, but OP did mention swapping out sticks and not seeing issues otherwise. but might be still worth trying just to rule any other issue out.

Whether it lists 64mb simms or not it’s worth noting the chipset supports 192mb of ram, so even if the board doesn’t have everything hooked up to support the max it still may see 128mb in one bank.

Considering it “works fine” with 64mb in either bank that points more towards board or chip damage. (Like address line 27 to the south bridge)
I would sometimes think a bad chip in cache but considering this boards cache configuration I’m not sure that is the cause of not being able to use 128mb.

Maybe worth installing 96mb to see if the same behavior occurs. Similarly if the cache can be removed/ disabled that should also be tested with 128mb

A memtest of the whole range is prudent, general stability testing the board at both 60 and 66mhz FSB (and 5.5volts) is prudent at this point as well. A visual inspection and possible rewetting of solder joints is also prudent to rule out damage.

rmay635703 wrote on 2024-08-31, 02:15:

auron wrote on 2024-08-30, 18:29:

the only requirement with parity is that you can't put a parity and non-parity module in the same bank, otherwise you can even run parity in one bank and non-parity in the other bank. and since OP asked about it, i'm pretty sure boards can't sense if a SIMM is 60ns or 70ns - it just won't use the faster timings to take advantage of 60ns. also, two 64 mb SIMMs is not listed as a valid combination, only four 32 mb (each 8Mx36).

i'd have suggested to test each bank individually with memtest, but OP did mention swapping out sticks and not seeing issues otherwise. but might be still worth trying just to rule any other issue out.

Whether it lists 64mb simms or not it’s worth noting the chipset supports 192mb of ram, so even if the board doesn’t have everything hooked up to support the max it still may see 128mb in one bank.

Unless the 192mb supported RAM is because the chipset has three banks? I couldn't find any information about that, though, but it seems like an odd amount for a 2-bank configuration?

douglar wrote on 2024-08-29, 18:42:

So it is stable when you use 32MB simms in banks 0,2 & 3 and stable when you use 32MB simms in banks 1,2,&3 , but not stable when you use 32MB simms in banks 0,1,2, & 3 ?

Did I get that right?

Maybe there's a short between banks 0 & 1 but it seems like the simplest explanation is the electrical load is just too high for the old capacitors.

thanks for your reply!
Well, it's actually simm 1 and 2 in bank 0, and simm 3 and 4 in bank 1. They go in pairs, and 1 pair is one bank. the cause being old caps absolutely could be, but they look fine. no bulging or leaking.. but yes, age could be a fact0r. It's a 1995 motherboard..

rmay635703 wrote on 2024-08-30, 16:35:

If you have a pair of 64mb simms laying around it would be interesting to test. […]
Show full quote

If you have a pair of 64mb simms laying around it would be interesting to test.

I honestly never knew that parity as a requirement was still a thing with p60, the one I had normal non-parity.

A common issue on old boards are “bad” unused simm sockets, might be a bit of coorsion or some other type of damage .

In so far as buffered FPM Ram I never saw that on Intel systems until after the 430lx was obsolete

Thanks for thinking along. Sadly I don't have 64MB simms in my stash. They are a bit hard to get here in Eyrope.. Yes on ebay there are some fore sale in the USA, but the shipping cost and probably customs costs to europe hold me back to buy them.
Parity and non parity are both supported by this board, according to the manual 😀

rmay635703 wrote on 2024-08-31, 02:15:

Whether it lists 64mb simms or not it’s worth noting the chipset supports 192mb of ram, so even if the board doesn’t have everyt […]
Show full quote

auron wrote on 2024-08-30, 18:29:

the only requirement with parity is that you can't put a parity and non-parity module in the same bank, otherwise you can even run parity in one bank and non-parity in the other bank. and since OP asked about it, i'm pretty sure boards can't sense if a SIMM is 60ns or 70ns - it just won't use the faster timings to take advantage of 60ns. also, two 64 mb SIMMs is not listed as a valid combination, only four 32 mb (each 8Mx36).

i'd have suggested to test each bank individually with memtest, but OP did mention swapping out sticks and not seeing issues otherwise. but might be still worth trying just to rule any other issue out.

Whether it lists 64mb simms or not it’s worth noting the chipset supports 192mb of ram, so even if the board doesn’t have everything hooked up to support the max it still may see 128mb in one bank.

Considering it “works fine” with 64mb in either bank that points more towards board or chip damage. (Like address line 27 to the south bridge)
I would sometimes think a bad chip in cache but considering this boards cache configuration I’m not sure that is the cause of not being able to use 128mb.

Maybe worth installing 96mb to see if the same behavior occurs. Similarly if the cache can be removed/ disabled that should also be tested with 128mb

A memtest of the whole range is prudent, general stability testing the board at both 60 and 66mhz FSB (and 5.5volts) is prudent at this point as well. A visual inspection and possible rewetting of solder joints is also prudent to rule out damage.

Thanks! I will try to see what 96MB does.. I didnt try that yet..
The cache is not removable on this board. The AMI bios is very limited, but I can try to see if the cache can be disabled.

Thanks all for your useful replies 😀 When I find some free time coming weekend or next week, I will conduct some more experiments. I will update this topic after.
best regards, Arno

hi all.. I didnt have time to test all suggestions. But what I know the same issue occurs when I put in 2x32MB and 2x 8MB simms. So with 80MB same problem. I will test it with 4x 16MB later on, but I have very limited time because of family priorities 😀

I also think it's a problem with the capacitor. When too much memory is inserted, the aging of the capacitor leads to a decrease, and the charging and discharging caused by access makes the voltage unstable, causing parity check errors

alphaaxp wrote on 2024-10-13, 16:25:

I also think it's a problem with the capacitor. When too much memory is inserted, the aging of the capacitor leads to a decrease, and the charging and discharging caused by access makes the voltage unstable, causing parity check errors

Thank you! It does make sense when you put it like that. However this board has SMD caps and I don't have the tools and/or experience replacing those.
Unless there is someone here at vogons in my area (South-Holland, Netherlands) willing to replace them for me 😀

I second the notion that buffered simms are probably required, as the simms in question did not exist when the board was manufactured.