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Help with understanding 486 L2 cache

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First post, by byte_76

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On a 486 motherboard, there are usually jumpers to configure the L2 cache size.

On my motherboards, I have found various cache sizes with tag.

When booting the PC, the size of the cache seems to match the tag module.

An example is my Gigabyte GA-5486AL which has this config:

4x UM61512AK-15 cache modules (1MB total?)
1x UM61256K-15 tag module (256KB total?)

The board indicates 256K cache at boot.

The manual specifies that the board supports 512KB cache.

1. Since the board has 1MB cache, why does it not indicate the maximum supported amount at boot? (512KB)

2. Can the board (BIOS?) be modified to support more cache? (To utilize the full 1MB)

Last edited by byte_76 on 2025-03-26, 09:18. Edited 2 times in total.

Reply 1 of 24, by byte_76

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How much cache is this?

Reply 2 of 24, by byte_76

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And how much cache is this?

Reply 3 of 24, by Mov AX, 0xDEAD

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byte_76 wrote on 2025-03-26, 08:19:

4x UM61512AK-15 cache modules (1MB total?)

Wrong, each chip is 64Kbyte, total 256Kbyte

Reply 4 of 24, by kixs

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Cache chip size in bites: 512K. In bytes it's 512/8 = 64KB. You multiply by number of chips: 4*64=256KB == Total cache size.
Cache chip size in bites: 256K. In bytes it's 256/8 = 32KB. You multiply by number of chips: 4*32=128KB == Total cache size.

Visit my AmiBay items for sale (updated: 2025-03-14). I also take requests 😉
https://www.amibay.com/members/kixs.977/#sales-threads

Reply 5 of 24, by byte_76

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kixs wrote on 2025-03-26, 08:59:

Cache chip size in bites: 512K. In bytes it's 512/8 = 64KB. You multiply by number of chips: 4*64=256KB == Total cache size.
Cache chip size in bites: 256K. In bytes it's 256/8 = 32KB. You multiply by number of chips: 4*32=128KB == Total cache size.

Thank you, that makes sense.
I thought the cache chips were KB and Google indicated 1MB total 😂🤦🏻‍♂️

Last edited by byte_76 on 2025-03-26, 09:21. Edited 2 times in total.

Reply 6 of 24, by byte_76

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So when the cache modules are increased the tag module needs to be replaced as well?

Eg. 4x UM61256FK-15 increased to 8x

So 128 tag (16KB) needs to be changed with 256 tag (32KB)?

Reply 7 of 24, by Mov AX, 0xDEAD

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byte_76 wrote on 2025-03-26, 09:09:

So when the cache modules are increased the tag module needs to be replaced as well?
Eg. 4x UM61256FK-15 increased to 8x
So 128 tag (16KB) needs to be changed with 256 tag (32KB)?

Depends on chipset, but usually yes, 16Kb-TAG is not enough to pair with 256Kb-L2

Reply 8 of 24, by kixs

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AI has no clue 🤣

Yes. Usually the TAG should be one size smaller in capacity.

Visit my AmiBay items for sale (updated: 2025-03-14). I also take requests 😉
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Reply 9 of 24, by dionb

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byte_76 wrote on 2025-03-26, 09:09:

So when the cache modules are increased the tag module needs to be replaced as well?

Eg. 4x UM61256FK-15 increased to 8x

So 128 tag (16KB) needs to be changed with 256 tag (32KB)?

That depends on cache layout and mode - and on whether the tag is currently at its limits or not.

There's a high-level explanation here: https://www.dosdays.co.uk/topics/cache.php
(I suspect they mixed up the table though, Write-back requires an extra - dirty -bit vs Write-through, so you should need more tag, not less).

A good motherboard manual shows supported cache configurations and required tag for each of them. Rather surprisingly, despite being very verbose, the GA-5486AL manual (which Gigabyte still has online - kudos to them 😀 ) doesn't do this. However TH99 comes to the rescue, and has been preserved/enriched by TheRetroWeb: https://theretroweb.com/motherboard/manual/33066.pdf

So in the specific case of the 5486GL you would need to upgrade the tag in every scenario when upgrading the cache.

You don't post names of the other boards you're working with, so a conclusive answer for your third pic isn't possible, but if you take a generic 486 board with 2 banks of 4 chips you get something like this:
https://theretroweb.com/motherboard/manual/34297.pdf

If you currently have a 128kb (16k x 8 ) tag, that's sufficient for 256kB, so you can upgrade to 256kB by adding 4 256kb chips without upgrading the tag. To upgrade to 512kB would need a bigger 256kb (32k x 8 ) tag.

Note that there might be board-specific considerations with different outcomes, so ID the board and check its documentation to be sure. It is likely that you will have some jumper settings to do as well if you change the configuration.

Reply 10 of 24, by byte_76

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The other board with the Aster tag is a Gigabyte GA-486AM/s

https://theretroweb.com/motherboards/s/gigabyte-ga-486am

I have a pack of 10x UM61256FK-15 modules on the way, so I’d like to be able to populate those empty slots.

If I understood you correctly, there should be no problem in doing so with the current Aster tag module still in use.

I could order a larger capacity tag from AliEx but what model number do I search for? (Struggling to find tag cache modules on there)

The other board has soldered cache so I won’t be changing anything there.

Last edited by byte_76 on 2025-03-26, 12:41. Edited 2 times in total.

Reply 11 of 24, by darry

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byte_76 wrote on 2025-03-26, 09:01:
kixs wrote on 2025-03-26, 08:59:

Cache chip size in bites: 512K. In bytes it's 512/8 = 64KB. You multiply by number of chips: 4*64=256KB == Total cache size.
Cache chip size in bites: 256K. In bytes it's 256/8 = 32KB. You multiply by number of chips: 4*32=128KB == Total cache size.

Thank you, that makes sense.
I thought the cache chips were KB and Google indicated 1MB total 😂🤦🏻‍♂️

On a tangential point about AI:

Using AI, in a way, is a lot using Wikipedia, IMHO, in the sense that it is a useful starting point that can point you to references. However, it can be patently wrong in interpreting anything, including a datasheet or specs. Sometimes, asking similar questions will yield alternately wrong and good answers.

In this case, I got an accurate answer.

The attachment Screenshot_20250326-081930-638.png is no longer available

And I asked for and got a valid reference.

The attachment Screenshot_20250326-082030-798.png is no longer available

Reply 12 of 24, by byte_76

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darry wrote on 2025-03-26, 12:29:
On a tangential point about AI: […]
Show full quote
byte_76 wrote on 2025-03-26, 09:01:
kixs wrote on 2025-03-26, 08:59:

Cache chip size in bites: 512K. In bytes it's 512/8 = 64KB. You multiply by number of chips: 4*64=256KB == Total cache size.
Cache chip size in bites: 256K. In bytes it's 256/8 = 32KB. You multiply by number of chips: 4*32=128KB == Total cache size.

Thank you, that makes sense.
I thought the cache chips were KB and Google indicated 1MB total 😂🤦🏻‍♂️

On a tangential point about AI:

Using AI, in a way, is a lot using Wikipedia, IMHO, in the sense that it is a useful starting point that can point you to references. However, it can be patently wrong in interpreting anything, including a datasheet or specs. Sometimes, asking similar questions will yield alternately wrong and good answers.

In this case, I got an accurate answer.

The attachment Screenshot_20250326-081930-638.png is no longer available

And I asked for and got a valid reference.

The attachment Screenshot_20250326-082030-798.png is no longer available

And that’s why I came here instead. 😁

Reply 13 of 24, by dionb

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byte_76 wrote on 2025-03-26, 11:01:
The other board with the Aster tag is a Gigabyte GA-486AM/s […]
Show full quote

The other board with the Aster tag is a Gigabyte GA-486AM/s

https://theretroweb.com/motherboards/s/gigabyte-ga-486am

I have a pack of 10x UM61256FK-15 modules on the way, so I’d like to be able to populate those empty slots.

If I understood you correctly, there should be no problem in doing so with current the Aster tag module still in use.

Correct, according to that board's jumper manual that should be fine.

I could order an bigger tag from AlieX but what model number do I search for? (Struggling to find tag cache modules on there)

Well, 32k x 8 would be the obvious upgrade unless you want to go crazy with 1MB of cache, and a good example of a 32k x 8 chip is... the UM61256FK-15, so no need to order anything else.

The other board has soldered cache so I won’t be changing anything there.

That's next level; even if the (de)soldering itself isn't too hard (with the right tools it isn't), you then have to figure out how to configure a board for different cache that most likely doesn't have the settings exposed in jumpers. Almost certainly doable, but a lot of work for very little result - the difference between no cache and cache is huge, the difference between medium-sized (256kB) and big cache is very small indeed.

Oh, and regarding AI and old hardware stuff, I did a little test last week: Using AI to find information on old hardware - a case study

TLDR: most answers are worse than useless. LLM AI doesn't actually understand anything, just predicts the next word. That leads to a lot of AIs just predicting the most likely jumper setting based on a large sample of boards - even if said jumpers don't exist or do something else... AI can be good for very high-level overview (but even there is better at marketing blurb than technical content), but as soon as accuracy and causality become important, its shortcomings are glaring.

Reply 14 of 24, by Matth79

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You can use a larger tag than needed, so if chips are in a bundle of 10, you can use 8 for the cache and 1 for the tag even if the specified tag size is less

Reply 15 of 24, by mkarcher

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Matth79 wrote on 2025-03-26, 15:11:

You can use a larger tag than needed, so if chips are in a bundle of 10, you can use 8 for the cache and 1 for the tag even if the specified tag size is less

Especially, if we are talking about the extremely common configuration of 8 data chips with 256kBits (i.e. 256KByte cache), I have not yet encountered any board that had trouble with a 256kBit tag chip. The 128kBit tag chips were introduced quite late in the 486 age, and 9*256kBit was a very common configuration before the cheaper 128kBit chips even existed. If a board has different jumperings for "Aster tag" and "Winbond tag", you only need to care about that jumper if you have a 128kBit Tag. A 256kBit tag will work in either configuration, and it doesn't have to be made by either of these two manufacturers.

Reply 16 of 24, by byte_76

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Thank you.

Initially I thought that a tag module was different from a regular cache module but I understand now that it’s exactly the same thing, just usually dip-28 it seems.

So when I receive the modules I ordered, I’ll put 4 into the open cache sockets and replace the Aster module with one of the new UM modules as well.

Reply 17 of 24, by byte_76

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Would I be able to use these modules in the GA-5486AL to increase the cache size to 512KB?

Cache: 4x IS61C1024-15N
Tag: 1x IS61C256AH-15N

Reply 18 of 24, by dionb

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byte_76 wrote on 2025-03-27, 07:59:

Thank you.

Initially I thought that a tag module was different from a regular cache module but I understand now that it’s exactly the same thing, just usually dip-28 it seems.

So when I receive the modules I ordered, I’ll put 4 into the open cache sockets and replace the Aster module with one of the new UM modules as well.

No need. This is one of those very late 486 board and as the jumper guide for it shows 128kb tag is both supported and specifically indicated for 256kB total (either 8x 256kb or 4x 512kb).

byte_76 wrote on 2025-03-27, 08:09:

Would I be able to use these modules in the GA-5486AL to increase the cache size to 512KB?

Cache: 4x IS61C1024-15N
Tag: 1x IS61C256AH-15N

4x 1024kb and 1x 256kb tag... assuming they all work: yes.

See the jumper guide: https://theretroweb.com/motherboard/manual/33066.pdf

Don't expect significant improvement in speeds with the upgrade unless you have truly huge amounts of RAM in there.

Reply 19 of 24, by byte_76

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Thank you, I appreciate the insightful response.

I plan to install 32MB EDO ram in one machine and 16MB each in the other two.

They’re really just my own ultimate 486 builds based on different chipsets. I do realize that it’s overkill for a 486 but I’m enjoying the experience of messing with them.

Now if I can just get my hands on a Cyrix 5x86 😅