VOGONS


First post, by red-ray

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I have been looking into umov and as MSVC6 does not support umov in __asm blocks I need to figure out what to emit to do umov eax, 1, looking at https://en.wikipedia.org/wiki/X86_instruction_listings it has umov as such as 0F 1X /r, but I a, unclear as to what /r is.

file.php?id=216791

I guess Intel have repurposed things as MSVC6 thinks 0F 13 is an SSE operation.

Last edited by red-ray on 2025-04-23, 08:10. Edited 2 times in total.

Reply 1 of 4, by jakethompson1

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It does not look like that instruction can be encoded using an immediate as source.

nasm assembles umov eax,ecx as

0f 11 c8

Like VC++6, objdump thinks that is an SSE instruction.

The /r is the Mod R/M byte, the encoding is given on page 525 here: https://cdrdv2.intel.com/v1/dl/getContent/671200

Reply 2 of 4, by red-ray

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jakethompson1 wrote on 2025-04-12, 01:29:

It does not look like that instruction can be encoded using an immediate as source

Thank you, I was hoping to use umov to tell if a CPU without CPUID is AMD or Intel as https://www.ardent-tool.com/CPU/486_Step.html says Intel 486 don't have umov and AMD do, however as you can see below my DX/33 SX729 seems to have it. I wonder if NT 4.00 catches the trap and fixes it up. I will see what happens on other i486.

I think the best I can do is deduce Intel if it does fail. It will also fail on Cyrix, but the umov code won't get used as SIV will have already figured out it's Cyrix.

file.php?id=216808

The plot thickens, I checked what happens with my SX/33 SX797 and the umov is effectively a nop as eax does not change!

file.php?id=216821

Clearly we need to see what happens on several other CPUs so I have attached the SIV32L V5.81 UMOV-04 test SIV.

If you have a i486 system with am AMD or Intel CPU that does not support CPUID please do SIV32L -DBGCPU > SIV_DBGOUT.log | MORE and post what get's logged in SIV_DBGOUT.log and exactly which CPU you have, for me it's:

CPU Name and S-Spec   CPUID   SIV_DBGOUT.log output
Intel DX/33 SX729 SIV32L umov eax, ecx - eax = 00000001
Intel DX/33 SX810 Y SIV32L umov eax, ecx - eax = 00000001
Intel DX2/50 SX954 Y SIV32L umov eax, ecx - eax = 00000001 - labelled as SX807 so a fake
Intel DX4/100 SX900 Y SIV32L umov eax, ecx - eax = 00000001
Intel SX/33 SX797 Y SIV32L umov eax, ecx - eax = 87654321
Intel SX2/50 SX845 Y SIV32L umov eax, ecx - eax = 87654321
Intel POD83 SU014 Y SIV32L umov eax, ecx - exception
Cyrix 5x86-S-WT (M1sc) SIV32L umov eax, ecx - exception
AMD Am486 DX2 Model 3 SIV32L umov eax, ecx - eax = 00000001
AMD Am5x86 Mod E S 4 Y SIV32L umov eax, ecx - eax = 87654321 - Model E Stepping 4

This can be done on either Windows 9x or NT. Note: most of my i486 do have CPUID so I built a special SIV version so they would execute the umov.

Last edited by red-ray on 2025-04-14, 22:11. Edited 11 times in total.

Reply 3 of 4, by red-ray

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I adjusted SIV so my Cyrix 5x86-S-WT (M1sc) did the umov and got an exception, so Windows NT V4.00 SP6a does not do umov fixups.

file.php?id=216830

Reply 4 of 4, by red-ray

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For completeness I felt I should confirm umov eax, ecx throws an expectation on my Intel POD83 SU014, as you can see below it does

file.php?id=216859