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Reply 520 of 532, by jakethompson1

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crazyc wrote on 2025-05-28, 22:50:

so it's not possible to build a PC compatible using a 80186

This isn't quite true and although it doesn't make a lot of sense there is one real example of it, the Triumph-Adler P50.

I think the point is that one would have to disable the onboard peripherals on the 186, then duplicate their functionality with external chips.
But I'm mainly replying to mention that there were some NEC versions of an "IBM-compatible 80186" like the V41; where they too late or rare to make more of an impact?

Reply 521 of 532, by SoftCat

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The Hercules video card can be configured to generate a video signal with CGA frequencies (15.7 kHz and 60 Hz). Even the video RAM can be organized the same way as the CGA. I just don't know if a monochrome monitor will understand it. If you re-solder just one contact in the cable, you can connect it to a CGA monitor and the monochrome 640x200 mode will work.

Reply 522 of 532, by jal

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crazyc wrote on 2025-05-28, 22:50:

so it's not possible to build a PC compatible using a 80186

This isn't quite true and although it doesn't make a lot of sense there is one real example of it, the Triumph-Adler P50. It would be more accurate to say that it's not possible to build a PC compatible using a 80186's internal peripherals.

Yeah, that could be the case, although I haven't checked the exact addresses of the built-in stuff to see if they never cause any problems.

JAL

Reply 523 of 532, by jal

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SoftCat wrote on 2025-05-29, 13:22:

The Hercules video card can be configured to generate a video signal with CGA frequencies (15.7 kHz and 60 Hz). Even the video RAM can be organized the same way as the CGA. I just don't know if a monochrome monitor will understand it. If you re-solder just one contact in the cable, you can connect it to a CGA monitor and the monochrome 640x200 mode will work.

The RAM on a Hercules card is organized the same way as the CGA, since it uses the same text mode scheme (1 byte character, 1 byte attribute), and the same 6845 as the CGA does, with its limitations. Except that in Hercules graphics mode, the 6845 is programmed with a character height of 4 (instead of the 2 for CGA), to be able to access all of its 384 lines, so the odd/even line problem with CGA is twice as bad, having four interlaced address blocks.

JAL

Reply 524 of 532, by mkarcher

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jal wrote on 2025-05-29, 19:13:

Yeah, that could be the case, although I haven't checked the exact addresses of the built-in stuff to see if they never cause any problems.

The address of the built-in peripherals is configurable, and you can e.g. set them to I/O addresses FF00..FFFF which is not going to conflict with any ISA-type hardware that is usually limited to the range 0..3FF.

Reply 525 of 532, by SoftCat

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jal wrote on 2025-05-29, 19:19:

The RAM on a Hercules card is organized the same way as the CGA, since it uses the same text mode scheme (1 byte character, 1 byte attribute), and the same 6845 as the CGA does, with its limitations. Except that in Hercules graphics mode, the 6845 is programmed with a character height of 4 (instead of the 2 for CGA), to be able to access all of its 384 lines, so the odd/even line problem with CGA is twice as bad, having four interlaced address blocks.

Yes, I am aware of that. Only Hercules has 348 lines in graphics mode, 2 less than EGA. In CGA compatibility mode, Hercules can be programmed to have a character height of 2. Apparently, you will need a CGA monitor for that.

Reply 526 of 532, by SoftCat

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SoftCat wrote on 2025-05-29, 13:22:

The Hercules video card can be configured to generate a video signal with CGA frequencies (15.7 kHz and 60 Hz). Even the video RAM can be organized the same way as the CGA. I just don't know if a monochrome monitor will understand it. If you re-solder just one contact in the cable, you can connect it to a CGA monitor and the monochrome 640x200 mode will work.

Yes, also CGA monitor needs positive V-SYNC polarity. So this signal needs to be inverted. Probably it will be too complicated for such a trivial purpose.

Reply 527 of 532, by GloriousCow

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MartyPC 0.4.1 has been released. Mostly bugfixes, but we added the V20's 8080 emulation mode and some additional geometries for the Xebec controller.

I fixed the static compilation so it should no longer need any MSVC runtimes.

MartyPC: A cycle-accurate IBM PC/XT emulator | https://github.com/dbalsom/martypc

Reply 528 of 532, by SoftCat

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Is it possible to make a pseudo-graphic mode 128x128 (with R9 = 0) on CGA? How should CRTC be programmed? Everything is clear with horizontal parameters. What about vertical parameters? There will probably be more than one area.

Reply 529 of 532, by reenigne

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SoftCat wrote on 2025-06-04, 12:35:

Is it possible to make a pseudo-graphic mode 128x128 (with R9 = 0) on CGA? How should CRTC be programmed? Everything is clear with horizontal parameters. What about vertical parameters? There will probably be more than one area.

You should probably make a new topic for this, but the problem with R9=0 is that the CRTC only has 7 bits (so can only count 128 rows + up to 31 scanlines of vertical total adjust) but CGA monitors require 262 scanlines. So setting R9=0 implies that you need to do some frame-stacking tricks to get enough scanlines between vsyncs. Is that what you mean by "there will probably be more than one area"? If not, what do you mean?

Reply 530 of 532, by SoftCat

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reenigne wrote on 2025-06-04, 12:55:

So setting R9=0 implies that you need to do some frame-stacking tricks to get enough scanlines between vsyncs. Is that what you mean by "there will probably be more than one area"? If not, what do you mean?

Yes, that's what I mean. How do I do the tricks to get 262 lines in a frame?
New topic here:
CGA pseudo-graphic modes

Reply 531 of 532, by reenigne

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SoftCat wrote on 2025-06-04, 13:01:
reenigne wrote on 2025-06-04, 12:55:

So setting R9=0 implies that you need to do some frame-stacking tricks to get enough scanlines between vsyncs. Is that what you mean by "there will probably be more than one area"? If not, what do you mean?

Yes, that's what I mean. How do I do the tricks to get 262 lines in a frame?

The easy way is to read the CGA status register in a tight loop. Or rather several tight loops: one to find the vsync pulse, then one to find the start of the active area, then as many as you need to find the scanline that you want. Once you've synchronised the CPU with the CRTC you can reprogram CRTC registers on particular scanlines to set up the sequence of CRTC frames that you want. For example, you might set up a 127 scanline frame, then a 135 scanline frame. You'll need to program the vertical sync position register differently in the different CRTC frames as well as vertical total adjust and vertical displayed. You might also want to change the start address registers if you don't want to display the same thing in both frames. https://github.com/reenigne/reenigne/blob/mas … 00line/l100.asm is the source for the portraits effect in 8088 MPH so you can study that as an example and play around with it.

That way involves the CPU spending a lot of time reading the CGA status register, so the more advanced way is to set up the PIT to fire IRQ0 at appropriate times in the frame. By programming new periods into port 0x40 (without resetting the PIT by writing to port 0x43) you can have IRQ0s occurring at irregular intervals (e.g. scanline 0 and 100). We used that trick in some places in 8088 MPH and Area 5150. It leaves more CPU time free for other things, but is more complicated to set up, and one must be aware that interrupts being disabled for too long might lead to the effect breaking.

Reply 532 of 532, by SoftCat

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reenigne wrote on 2025-06-04, 13:28:

The easy way is to read the CGA status register in a tight loop. Or rather several tight loops: one to find the vsync pulse, then one to find the start of the active area, then as many as you need to find the scanline that you want. Once you've synchronised the CPU with the CRTC you can reprogram CRTC registers on particular scanlines to set up the sequence of CRTC frames that you want. For example, you might set up a 127 scanline frame, then a 135 scanline frame. You'll need to program the vertical sync position register differently in the different CRTC frames as well as vertical total adjust and vertical displayed. You might also want to change the start address registers if you don't want to display the same thing in both frames. https://github.com/reenigne/reenigne/blob/mas … 00line/l100.asm is the source for the portraits effect in 8088 MPH so you can study that as an example and play around with it.

That way involves the CPU spending a lot of time reading the CGA status register, so the more advanced way is to set up the PIT to fire IRQ0 at appropriate times in the frame. By programming new periods into port 0x40 (without resetting the PIT by writing to port 0x43) you can have IRQ0s occurring at irregular intervals (e.g. scanline 0 and 100). We used that trick in some places in 8088 MPH and Area 5150. It leaves more CPU time free for other things, but is more complicated to set up, and one must be aware that interrupts being disabled for too long might lead to the effect breaking.

Thank you very much for your detailed answer!
Please tell me, is it necessary to add 1 to registers R2, R3 and R7 to get the corresponding values? That is, if, for example, R3 = 15, then horizontal sync width = 15 or 16? What happens if R3 = 0? Otherwise, they write differently everywhere.