douglar wrote on 2025-01-30, 02:24:
lti wrote on 2024-10-21, 04:33:
Based on the schematic, it just connects the PDIAG signal properly.
https://hackaday.io/project/186809-m2-sata-to … rse-engineering
My 2.5" adapter connects pin 46 of the chip directly to the IDE connector with no series resistor or pull-up. It doesn't seem to make any difference because the motherboard I'm using doesn't connect that pin at all (it's completely floating - verified with the schematic), and it still only uses UDMA2.
I tried out putting the 10K resistor at RH1 and a 1K resistor at R16 it didn't improve anything for the Promise 20630 VLB controller when loading the driver in DMA mode.
It's remarkable how far the generic bridges deviate from jmicron's intended spec.
I was digging into this the other night because I got one of those SATA M.2 to 44 pin IDEs to try in my Panasonic Toughbook.
Of course, it doesn't work*, but looking at these schematics including the forum post in Spanish, I can't see how these resistor changes would help anything with ISA or VLB. The only thing I can see it fixing is UDMA66 and higher controllers and the test for an 80-conductor cable. Did you try the other mismatched resistors/capacitors/etc. and did anything help? Any speculation on whether those MODE[1:0] straps, and the other FXDMA one (hardwire UDMA mode rather than obeying SET FEATURE command) help? What if the 25 MHz crystal were replaced with something slower?
I'm going to try and read those SCR registers that the JM20330 datasheet suggests exist, and maybe get an indication of exactly what error is occurring on the SATA side when an MWDMA or UDMA transaction fails, e.g. with PIIX3.
* it works in Linux if I pass libata.force=udma/100 (to override 133 or 150 or whatever it defaults to). However, I still can't boot from it. INT 13H successfully loads the MBR, but sets the carry flag, so the BIOS refuses to boot. I've got a CF adapter on the way to try instead.