pixel_workbench wrote on 2025-12-01, 13:30:Intel's marketing was BS as usual, I would argue that an out of order architecture was more dependent on cache, given how disab […]
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MattRocks wrote on 2025-12-01, 06:42:The cache-less Celeron was not too bad. It was the later on-die-cache Celeron that was too good. […]
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pixel_workbench wrote on 2025-12-01, 04:54:
I ran some gaming benchmarks, and a cache-less Celeron needs to reach 450mhz just to equal the performance of a Celeron 300A at stock, so yeah, it was bad. But for some reason it's not in demand the same way other historical flops are, like a fx5800 or a 2900xt.
The cache-less Celeron was not too bad. It was the later on-die-cache Celeron that was too good.
The cache-less Covington Celeron was never designed to compete with Workstation CPUs because they occupied different product tiers. Any confusion emerges from Intel historically focusing on the Workstation and Enterprise tiers..
Office / Value tier:
Cyrix 6x86
Cyrix MX
Cyrix MII
Celeron <- this the product in question
IDT WinChip
Cyrix M3
Workstation / Performance tier:
Pentium
Pentium MMX
Pentium II
Pentium III
Enterprise / Server tier:
Pentium Pro
Pentium II Xeon
Pentium III Xeon
These tiers are very clear. The important nuance is that hobbyists transcend tiers by picking whatever delivers most bang for buck, and throughout history hobbyists generally did not choose a budget office CPU to chase gaming performance. Intel entered the budget Office tier in 1998 with very clear established marketing: "Pentium inside" is what hobbyists should be seeking, not something else!
From a tier perspective the oddball is not the original Celeron - that Celeron fits unambiguously in that budget office tier alongside Cyrix processors (good for MS Office, poor for Quake, rubbish at Adobe Premiere Pro). And, as expected, hobbyists immediately noted that Intel's new budget office CPU performed exactly like a budget office CPU.
The mistake came later. All Celerons were CPUs that supported out-of-order instructions, a feature that Intel itself had argued meant they didn't need a cache at all - so why add a cache to the budget Office tier? And, why add a cache that runs cool?
For hobbyists, adding a small cool cache to the Celeron instantly blurred the boundary between Office tier and Workstation tier. And, it didn't stop there because hobbyists found a way to overclock the 566MHz Celeron to 1GHz when Intel's premium enterprise CPU with bigger hotter cache topped out at 800MHz.
For a brief moment the tiers collapsed - it takes a very special kind of thinking to believe Intel intended the Celeron to collapse the product tiers that Intel had spent decades crafting.
Note: I intentionally omit AMD from this recount because AMD were on a mission to force errors at Intel.
Intel's marketing was BS as usual, I would argue that an out of order architecture was more dependent on cache, given how disabling the L1 cache on a P2 or P3 instantly drops it to the level of a slow 386, whereas the Pentium MMX behaves more like a 486 when the L1 cache is disabled.
What Intel actually wanted was a piece of the budget and mainstream system market, because they abandoned socket 7, and many people weren't willing to shell out for a high end expensive P2 system. So they stripped down the P2 in the cheapest and simplest possible manner by removing L2 cache, and figured people would be too stupid to realize what a terrible performer it was. Why would anyone buy a crippled Celeron system when you could get the AMD K6-2?
The fact of Celeron 300A being too good was simply a byproduct of overclocking, and only applicable to the lower clocked versions. Once they got to 366mhz and higher, stable operation at 100mhz fsb was a lot less common, so it remained as a good budget cpu, and what the Celeron should have been all along.
What Intel removed from Covington was the L2 cache, not L1 cache.
I agree, Intel sought a slice of the budget office market and Intel never intended the office Covington to perform like a power user Pentium II.
Bare with me. Think of the NetBurst architecture. Intel promised the dream with NetBurst. Intel promised new heights in performance. Intel made clear everyone wants NetBurst! And then, when the excited new buyers unwrapped it and set it up.. it sucked.
Now think back to the Celeron. Intel made no big performance promise with Covington. Intel made clear the Covington targeted the slowest 20% of the PC market - and nobody should want to play games the slowest 20% of PCs! The promise was even typed onto Intel's retail packaging, "Designed for the Basic PC ".
There was no mention of 3D gaming. There was no mention of performance. There was no mention of anything exotic at all - just that it would deliver the slowest 20% of PCs. There was no bad marketing!
In that light the Covington wasn’t a bad soldier. It was a deliberately basic soldier and it diligently performed its basic duties at basic speed - it behaved exactly as a next generation basic product must, which is to not upstage the previous generation flagship. That meant the Pentium 233 MMX.
Now think of GPUs. Simply compare GeForce4 MX and GeForce 3. See how the next generation basic model quietly takes up its position guarding the rear - and that is exactly what Covington did! To say Covington is bad is to say GeForce MX is bad - they are bad, and they are supposed to be bad!
The actual "bad soldier" was the Mendocino because it broke ranks and wiped out half of Intel's roadmap. But, if the Mendocino was so dangerous, why did it ever launch? Because AMD 3Dnow changed the rules - it was cheap and exciting and wiped the floor with basic Covington.
For those who play chess, 3Dnow was "check!" Intel's response, the Mendocino, was a forced error. Adding 128KB on-die L2 was the cheap necessary response to an immediate problem. Intel didn’t want to launch a budget office chip that would destroy the Pentium II and Pentium III - it just had to.
And, Intel's sacrifice was AMD's well earned game board positioning.
