VOGONS


Reply 40 of 59, by Beerfloat

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Chkcpu wrote on 2026-01-08, 10:15:
Hi Beerfloat, […]
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Beerfloat wrote on 2025-12-31, 08:53:

I'm also hoping to find/cobble together Pentium MMX and K6-2/3 BIOS support with a voltage interposer.

Hi Beerfloat,

The SF586 05/18/95 (VIP3A-ZS1) BIOS is already on my “to be patched” list and I expect to start working on it later this month.

Note that the CPU support in this BIOS is very limited. I only see Pentium (P54) and Cyrix 6x86 (M1) support. No Pentium MMX, Cx6x86MX, K5, K6, or Winchip C6/2 support.
So I don’t know yet if Pentium MMX and K6-2/III support can be added to such an old BIOS. But Winchip support should be possible.
I will know more when I’ve completed the disassembly and analysis of this BIOS.

I will keep you posted.
Cheers, Jan

Hi Jan,
Real happy to hear it. I believe one of the previous owners already used this with a WinChip C6 so that might work without specific BIOS support.
My hope is eventually getting a K6-III(+) 400 up as that might just be a lot of fun with VLB.

(Zoals altijd weer goed bezig Jan. We wachten eea met spanning af!)

Cheers Mike

Last edited by Beerfloat on 2026-01-08, 17:04. Edited 1 time in total.

Reply 41 of 59, by Beerfloat

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Starting to consider that this Forex chipset may really be its own thing altogether.

Cloning or relabeling an Opti is one thing but different PCI vendor and device IDs? I reckon that's less likely

Reply 42 of 59, by bracecomputerlab

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I see a retro "gonzo" (i.e., independently developed without the chip manufacturer's assistance; does not imply negative meanings like crude or poor build quality) VL-Bus S3 Trio64V+ running the graphics of the Forex Pentium chipset based computer.
I have seen that somewhere else on Vogons from while back.

Babasha wrote on 2026-01-03, 20:36:
I see your board on eBay twice(?) Last time in .bg seller list - there is no cache tag chip so l2 cache no go And early in .de […]
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Beerfloat wrote on 2026-01-03, 19:41:

My board arrived and I'll be playing around with it in the next few days. The previous owner soldered a BF0/BF1 mod switch onto it.
I'll have to take a closer look at these cache chips because other pictures I've seen use a different configuration.

I see your board on eBay twice(?)
Last time in .bg seller list - there is no cache tag chip so l2 cache no go
And early in .de seller list - he use it with 2mb l2 cache and set up with pentium 200mhz (non-mmx) and idt winchip 200mhz

Reply 43 of 59, by bracecomputerlab

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Okay, this settles the Forex chipsets might be relabeled OPTi chipsets controversy I sort of raised.
I thought running lspci from Linux might be pretty hard today.
Nice to have a new PCI Vendor and Device IDs display utility program that is DOS based.
I think one version of a 486 Efar chipset was a relabeled OPTi 82C802 chipset.
Note that Efar was purchased by Standard Microsystems Corporation (SMC, later SMSC) according to an article from Microprocessor Report around 1995, and perhaps they had a hand in developing Victory-66 south bridge that can be used with Intel FW82443BX (440BX north bridge).

Beerfloat wrote on 2026-01-08, 16:41:

Starting to consider that this Forex chipset may really be its own thing altogether.

Cloning or relabeling an Opti is one thing but different PCI vendor and device IDs? I reckon that's less likely

Last edited by bracecomputerlab on 2026-01-13, 04:52. Edited 1 time in total.

Reply 44 of 59, by Babasha

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draft of UNOFFICIAL user manual 😀

Need help? Begin with photo and model of your hardware 😉

Reply 45 of 59, by Beerfloat

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Babasha wrote on 2026-01-11, 14:44:

draft of UNOFFICIAL user manual 😀

Bangup job Babasha. Real nice work on this!

Notes, not in any way meant as criticism:
- Should note somewhere that it's not an official manual. It looks that good (though the sections on VLB controls and troubleshooting should tip the reader off)
- You could actually include the frequency table in manual? Even if it's tentative.
- Last page (Board Layout) still empty. It's a draft, right?

Reply 46 of 59, by Beerfloat

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Hey, been spending time on and off trying to get my board to a state I'm happy with and thought I'd give an update. It hasn't been the most straightforward experience overall compared to other boards but it's finally DOS and Windows stable and even pleasant to use.

First of all, L2 write back cache as opposed to write through makes a TON of difference on this board. Doom goes from 24.04 to 35.51 fps. Quake from 10.1 to 19.2 fps. The general feel in Windows is much, much smoother. More on cache in a followup post.

We've seen that 2 SIMMs are a little faster than one (26.13 MB/s vs 24.65 in Speedsys, 31 vs 34 in cachechk), still hardly 64-bit access memory bus territory. But sadly, outside of DOS, I can't say I've seen a truly stable experience on this board with more than a single SIMM installed. I intend to test some more SIMMs eventually.

Worse, the SIMM slots called SLOT 1 and 2 (both on BANK 1) do not seem to be functional on my particular board. I believe I got at least one of them to work one time but not anymore. And that's too bad because I had hoped to test whether our special chipset supports main memory bank interleaving, something a bunch of chipsets at the time were implementing. Maybe something someone else feels like looking into.

I also had varying luck with videocard compatibility, though some of that is likely due to using an LCD screen.

Tseng ET4000/W32p (Diamond Stealth 32 VLB) is recognised as an ET4000 by Win98SE and the basic Microsoft driver does work. The preferred OEM 'ET4000/W32 VLB' and 'Ultimate Truecolor /XL' 'Enhanced' drivers cause an invisible mouse cursor (even with acceleration down one notch) so that's not really usable.

My Tseng ET4000/W32i cards cause freezes during non-P&P phase of detection. I guess I could cancel and install manually but I don't really want that in my system.

An ARK 1000VL does work but anything above 640x480 gives a black screen on my Eizo with latest 1.29 driver, while 1.07 had an image corruption issue. Also this card has relatively fuzzy image quality.

My known good S3-864 (Genoa Phantom 64) works with Win98SE's built in 'S3' driver but shows major display and mouse cursor corruption when the S3 OEM driver is loaded. Tried a bunch of things to no avail. Only seen on this motherboard so far.

My S3-Trio64 (Spea V7-Mirage-P64-VL) seems to work fine, as does my S3-Trio32 (miroCRYSTAL 12SD VL). The latter has slightly sharper output and the cards are very close outside of high res Windows work, so that's my card.

As for VLB IDE controllers, the VLB Promise 20630 (EIDE2300) seems to work fine all the way up to D:6 and M:8 (fastest PIO and DMA modes).
My Holtek VIO3B seems ok as well but my Gotek doesn't seem to come up quickly enough on first boot for it not to flag a floppy timeout.

I have yet to try any PCI cards but I'll look into performance there later. I reckon we're mostly here for the VLB.

Last edited by Beerfloat on 2026-01-16, 20:49. Edited 1 time in total.

Reply 47 of 59, by Beerfloat

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I've been testing single bank cache configurations while waiting for more cache chips to fill the other bank.
The single bank is the one closest to the memory slots, presumably bank 0.

In addition to the cache chips that came with the board, I tested the ubiquitous ISSI IS61C1024-15N and Winbond W241024AK-15 128Kb x 8 SRAMs.
My board arrived without a tag chip and I tried a couple. It looks like the tag can be the same speed rating as the other cache chips. All of the chips I've used are marked 15ns.

Here are cache jumper settings not previously documented in this topic:
512KB single bank: JP10: 1-2, JP11: 2-3, JP12: Closed, JP13: 1-2, JP14: 1-2
512KB requires at least a DIP28 32Kb x 8 (32KB) or larger tag.

1024KB single bank: JP10: 1-2, JP11: 2-3, JP12: Closed, JP13: 2-3, JP14: 1-2
1024KB single bank seems to require at least a 64Kb x 8 (64KB) tag chip(!). Which means DIP32.
Try as I might, I could not get 1024KB single bank to work with any 32Kb x 8 tag.

After more testing I found 1024KB single bank does in fact work with a DIP28 32Kb x 8 tag.

The 1024KB setting brings a warning from CTCM16N and newer about the cacheable area being < 2MB, or less than main memory.
I think this may be a misdetection as benchmark results are not affected. Speedsys, Windows and game scores continue to be great. Earlier versions of CTCM as well as cachechk do not note any issues.
I am fairly certain that this must be the correct 1024KB jumper setting. There are 162 possible combinations of these jumpers and I tried them.

Just as a reference here are other single bank combinations that I came across that appear stable:
512KB: JP10: 1-2, JP11: 1-2, JP12: Closed, JP13: 1-2, JP14: 1-2
512KB: JP10: Open, JP11: 1-2, JP12: Closed, JP13: 1-2, JP14: 1-2
512KB: JP10: Open, JP11: 2-3, JP12: Closed, JP13: 1-2, JP14: 1-2
512KB: JP10: 1-2, JP11: Open, JP12: Closed, JP13: 1-2, JP14: 1-2
512KB: JP10: Open, JP11: Open, JP12: Closed, JP13: 1-2, JP14: 1-2
512KB: JP10: 1-2, JP11: 2-3, JP12: Closed, JP13: Open, JP14: 1-2
256KB: JP10: Open, JP11: Open, JP12: Closed, JP13: Open, JP14: 1-2

Also boots but errors in one test or the other, not looked at it in detail:
128KB: JP10: Open, JP11: 1-2, JP12: Open, JP13: Open, JP14: 1-2
128KB: JP10: Open, JP11: Open, JP12: Open, JP13: Open, JP14: 1-2

Reply 48 of 59, by Babasha

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Photos and BIOS patched for AMD K6-2/2+/3 (you need Powerleap or Evergreen Spectra interposer for CPU core voltage conversion!). Tnx @Beerfloat - Re: Modding support for AMD K6-2 into a Socket 5 Award BIOS?

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Reply 49 of 59, by Beerfloat

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Hi, thanks Babasha for keeping this topic updated.

Attached a new version of the BIOS with all current fixes:
- No wrmsr during boot for K6 compatibility (idea by jakethompson1)
- Start date 2000 instead of 1994 (Jan Steunebrink)
- Award 2GB storage display bug type 2 fix to 8GB (Jan Steunebrink)
- Bunch of typos in the original BIOS fixed ('Auto Confiuration', 'CAS Write Pluse Width' etc etc)

I rebased this one off the original VIP3A-ZS1.
BABASHA1 and derivatives show a minor issue on my board; After a 'CMOS Clear/Load BIOS/SETUP Defaults' cycle, every subsequent boot would have Caps Lock turn on, possibly flagging an error.
Also, a spurious '@^' to the keyboard buffer every few boots. Hitting Caps Lock twice (and backspacing if necessary) would fix it and it'd be fine after that.
This newer VIP3AK61.BIN no longer has this behavior.

What does K6 compatibility mean with this patched BIOS?
Possibly not what you think it might mean. It merely does away with a step that causes the SF586 to halt during boot on an AMD K6/K6-2 or K6-3 CPU.

The board will not detect these CPUs correctly . It identifies them as 'Enhanced AM486DX4-S' and will not configure any CPU-specific registers.

It will not make the board able to provide the right voltages for these CPUs. You need either an interposer or a modified VRM.

The board's base clock will still be limited to 66Mhz (unofficial 80Mhz) - Super Socket 7 this is not. An interposer or a patch to BF0/BF1/BF2 underneath the board allows use of up to 6* multiplier.

Having said that, pretty much all K6-2 and K6-3 CPUs are a massive upgrade over the old Pentiums that this board officially supports.
The likes of K6INIT and equivalents make it go quite a bit faster still and are a fine substitute for proper BIOS support (which would still be great to see happen!).
I have both K6-2 400 and K6-3 400 running stably now and it may well be one of the fastest VLB setups ever.

What is the wrmsr fix about?
The only known socket 5 CPUs when this board was designed were Pentiums, specifically P54C. These introduced a handful of 'Model Specific Registers' for configuration and testing.
The original BIOS boot sequence for this board performs a little test. It toggles the 2nd bit of MSR 02h, known as the TR1 Parity Reversal Test Register.
This is supposed to accomplish 2 things; 1) Verify that the CPU detects cache parity errors by triggering one and 2) Disable the default instant shutdown on said parity error.

Is this necessary? No. Pentiums continue to boot fine whether or not this test happens. Sadly though it is a problem for pretty much every CPU that is not a Pentium or an IDT WinChip.
The Cyrix 6x86 does not support MSRs at all. AMD's K5, K6 and its successors, and the Cyrix 6x86MX do but not this specific MSR. The IDT Winchip C6 and 2 support a subset of this MSR, just enough to be able to do this simple test.
A write to an unsupported MSR returns a General Protection Exception, which at this stage results in a system hang. To prevent this the patched BIOS simply skips the test.

I've yet to try other CPUs than K6-2 and K6-3 but I reckon the regular K6 will work and possibly some of the others. The Pentium MMX (P55C) does support this MSR but may have some other problem. I will try it sometime soon.

Reply 50 of 59, by Beerfloat

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Just a quick update:
Tested a regular K6 and can confirm that CPU also boots now. Unlike the K6-2 and K6-3 it didn't work effortlessly right out of the gate; I ended up having to disable L1 cache to get through benchmarking. But that might just be this particular K6 or interposer, neither of which I had tested before.
This Powerleap PL-PROMMX-R V6.0 also supports up to K6-2 officially, as well as core voltages down to as low as 1.3v in 0.5V steps. Looking to try some other CPUs like K6-3+ with this one.

I hadn't tried Pentium MMX before on the SF586 board, and saw dionb reported no POST early in this topic, but my 233Mhz does actually seem to work.
Tested this one on an older V4.0 version of that Powerleap. I don't think it needs the patched BIOS.

Reply 53 of 59, by Beerfloat

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I guess this 386/486 combo VLB board is telling me that it's been too long since I got a spare parts list together for a Digikey order anyhow

Reply 54 of 59, by douglar

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Beerfloat wrote on 2026-03-17, 15:26:

I guess this 386/486 combo VLB board is telling me that it's been too long since I got a spare parts list together for a Digikey order anyhow

Did it give you a brilliant pyrotechnics display?

Reply 55 of 59, by Beerfloat

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douglar wrote on 2026-03-17, 15:46:
Beerfloat wrote on 2026-03-17, 15:26:

I guess this 386/486 combo VLB board is telling me that it's been too long since I got a spare parts list together for a Digikey order anyhow

Did it give you a brilliant pyrotechnics display?

Just a loud bang and debris flying against the wall. The wife was walking by and she thought it was all pretty funny.

Reply 56 of 59, by Babasha

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Just test my rig with Pentium MMX 166MHz
BIOS detect it as PENTIUM-S 180MHZ
All tests detect it as Pentium MMX 166MHz

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Quake for DOS - 27.4 fps
Quake for Win -30.2 fps

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Reply 57 of 59, by Beerfloat

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Babasha wrote on 2026-03-17, 16:08:

Just test my rig with Pentium MMX 166MHz
BIOS detect it as PENTIUM-S 180MHZ
All tests detect it as Pentium MMX 166MHz

Nice. The 233 was detected exactly the same. How did you handle the split voltage btw?

Reply 58 of 59, by rasz_pl

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Higher windows score signals something is very weird, not to mention low for a 166MMX. 30fps is below Intel 430FX + Pentium 133MHz and no L2 cache at all.

https://github.com/raszpl/sigrok-disk FM/MFM/RLL decoder
https://github.com/raszpl/FIC-486-GAC-2-Cache-Module (AT&T Globalyst)
https://github.com/raszpl/386RC-16 ram board
https://github.com/raszpl/440BX Reference Design adapted to Kicad

Reply 59 of 59, by Babasha

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rasz_pl wrote on 2026-03-17, 22:08:

Higher windows score signals something is very weird, not to mention low for a 166MMX. 30fps is below Intel 430FX + Pentium 133MHz and no L2 cache at all.

Welcome back to 1993 where the first gen of Pentium chipsets was born. No 64bit memory access (real memory performance something like 31-34MB) and PCI was feature technology not trsted at all (low compatibility, slow and bridged thru VLB, just look at 11MB speed of PCI videocard). Its normal for 1st gen chipsets like OPTI Python and VIA VT82C535.

https://dependency-injection.com/early-pentium-chipsets/

Windows "highscores" phenomen based on better Windows PCI implementations and its patches for slow 1gen chipsets.

Need help? Begin with photo and model of your hardware 😉