First post, by ekkiller
- Rank
- Newbie
I'm Looking for the manual for the motherboard FIC LMB-486LH.
https://theretroweb.com/motherboards/s/formos … trial-lmb-486lh
Does anyone have relevant information?
144KM……
I'm Looking for the manual for the motherboard FIC LMB-486LH.
https://theretroweb.com/motherboards/s/formos … trial-lmb-486lh
Does anyone have relevant information?
144KM……
I set up jumpers based on some pictures online and installed TI486DX2-66. It's alive!
There are still some issues.
I plugged in the 512k cache, but the POST interface shows no L2 cache. AIDA also reported that no L2 cache was detected.
144KM……
do you see any L2 cache on the pcb?
https://github.com/raszpl/sigrok-disk FM/MFM/RLL decoder
https://github.com/raszpl/FIC-486-GAC-2-Cache-Module (AT&T Globalyst)
https://github.com/raszpl/386RC-16 ram board
https://github.com/raszpl/440BX Reference Design adapted to Kicad
rasz_pl wrote on 2026-04-10, 20:47:do you see any L2 cache on the pcb?
256K L2 CACHE
144KM……
"The selected attachment does not exist anymore."
Im sorry, I missed "I plugged in the 512k cache" after just looking at picture of naked board
Jumpers will depend on the type/capacity of sram you plugged in. Afaik its impossible to make universal wiring that will take any capacity - you need jumpers to rewire certain pins. Here is example of a L2 cache module I reverse engineered some time ago https://github.com/raszpl/FIC-486-GAC-2-Cache … al%20rev2.4.png
there are 6 resistors (playing the role of jumpers) that one needs to connect or disconnect depending on populated SRAM to make the cache cover its address range.
To find which jumpers are cache related use multimeter continuity/beeping function and find jumpers connected to SRAM chip address lines.
https://github.com/raszpl/sigrok-disk FM/MFM/RLL decoder
https://github.com/raszpl/FIC-486-GAC-2-Cache-Module (AT&T Globalyst)
https://github.com/raszpl/386RC-16 ram board
https://github.com/raszpl/440BX Reference Design adapted to Kicad