Most hybrids disable the 386 when a 486 is placed, some have a jumper to select which is the active cpu.
Just be aware then those hybrids have horrible performance with a 486 since the chipsets have some limits from the 386 architecture.

I'm not planning to build a 386DX-33 system with a Cyrix 5x86 or AMD 5x86 running at over 100 MHz. I'm thinking more along the lines of a “386+” configuration — so an Intel or AMD 386DX paired with something around a 486DX2-66. That would still be roughly four times faster than a 386 at the same clock speed.

I know Cyrix DLC chips exist, but they might be too fast for many older programs and games, and there’s no easy way to slow them down.

How can I tell which motherboards disable CPU1 when CPU2 is installed in the socket?

It's also worth noting that it's rarely just one jumper you need to change - I have several of these hybrid motherboards, and there are at least 4 other jumpers that need changing (or at least verifying are correct) out of the 20 or so on the boards I have. So it's a bit of a hassle if you think you'd be switching CPUs regularly.

Funny ... this just came up in another thread -- wwwaaaaayyyy back in the day, my first multi-core system was TWO separate processors.

IIRC It was a "Tyan MP" board which took two AthlonMP devices.
My friend called it "the Whopper" (WarGames reference)

As far as I can recall, the only desktop mainboard I ever saw with two separate CPU sockets that were active at the same time!
(I once had a huge Compaq rack-mount server which IIRC could have 8 CPUs in it - but not a typical desktop)

In an AcerPower 386dx (Acer V5 motherboard) all three - 386, 387, 486 can sit in their sockets.

There's one jumper for CPU (386/486) selection, a 169th pin on the 486 CPU socket, and a 25MHz/33MHz XTAL selection via jumper.

Intel DX4 ODP-100 CPUs work great. They have the 169th pin.. but I don't think many motherboards rely on it for disabling the other CPU.

In Quake it scored the same as a real 486 motherboard using the same CPU, video card - 12 FPS.

Nvm1 wrote on 2026-05-21, 18:34:

Just be aware then those hybrids have horrible performance with a 486 since the chipsets have some limits from the 386 architecture.

Is there further explanation of this? UMC 491, SiS 461, and ALI M1419 come to mind as 386/486 chipsets that aren't unusually slow with a 486.

You can use 386DX chipsets with 5V 486 CPUs by ignoring Burst mode one cycle transfers between 486 L1 cache and external L2 cache. You lose a lot of L1 cache performance without Burst. I dont have precise number at how much performance, but guessing its probably somewhere around 20-30% compared to proper 486 chipset with good L2 cache support.
I think most combo mobos were build around 486 chipsets with extra 386 CPU socket to make it attractive to cheapskate customers, but there definitely are abominations using 386 era chipsets.

rasz_pl wrote on 2026-05-27, 19:24:

You can use 386DX chipsets with 5V 486 CPUs by ignoring Burst mode one cycle transfers between 486 L1 cache and external L2 cache. You lose a lot of L1 cache performance without Burst. I dont have precise number at how much performance, but guessing its probably somewhere around 20-30% compared to proper 486 chipset with good L2 cache support.
I think most combo mobos were build around 486 chipsets with extra 386 CPU socket to make it attractive to cheapskate customers.

Yeah, but those chipsets I mentioned all support burst mode. Perhaps uncertainty of how much of a hit the 486DLC would be, justified having those 386 sockets too.

I have these two...
https://theretroweb.com/motherboards/s/dataexpert-opti-495sx
and
https://theretroweb.com/motherboards/s/seanix-486lc1

And they both have a lot of jumpers to change over between CPU with only some bus speed ones in common.... if both can run at same bus.

The Seanix is listed as a contaq chipset there but it has 2 contaq chips and a SiS 95c206 but that must be some gate array or something.

Anyway, seems like you'd need an almost "Altair front panel" amount of switching to swap over.

The gold pressed latinum plated unobtanium unicorn horseshoe board, IBM/Alaris Cobalt boards with the Blue Lightning BL3 can typically run at 1, 2 or 3x multipliers and depending on clock chip 20-50mhz, and have an 8mhz deturbo. So those with cache on and off have a wild range of speeds, with L1 off it should be clock to clock with 386, @ 1x25 or whatever tickles your pickle. at full chat, 3x33 they are about 486DX2-66.

gregorem wrote on 2026-05-21, 18:45:

I'm not planning to build a 386DX-33 system with a Cyrix 5x86 or AMD 5x86 running at over 100 MHz. I'm thinking more along the lines of a “386+” configuration — so an Intel or AMD 386DX paired with something around a 486DX2-66. That would still be roughly four times faster than a 386 at the same clock speed.

I know Cyrix DLC chips exist, but they might be too fast for many older programs and games, and there’s no easy way to slow them down.

A Cyrix DLC won't be anywhere near faster than a 486DX2-66. The fastest of the Cyrix 386 upgrade chips is the (unobtainium) Cx486DRx2-33/66, which has the 486 instruction set and runs at 66MHz - but only has 1kB of cache which really hampers performance, which will be lower than a 486DX-33. The TI 486SXL2 is slightly faster due to its 8kB cache, but even that will be soundly outclassed by a full 486 (Intel or Cyrix) running at the same speed.

dionb wrote on 2026-05-28, 08:38:

A Cyrix DLC won't be anywhere near faster than a 486DX2-66. The fastest of the Cyrix 386 upgrade chips is the (unobtainium) Cx486DRx2-33/66, which has the 486 instruction set and runs at 66MHz - but only has 1kB of cache which really hampers performance, which will be lower than a 486DX-33. The TI 486SXL2 is slightly faster due to its 8kB cache, but even that will be soundly outclassed by a full 486 (Intel or Cyrix) running at the same speed.

Most likely big part of that difference is using 386 Bus thus no Burst support.

About 386 v 486 memory bus / burst mode.

I had a long technical conversation just now with Google AI about why a 386 with a DX4-100 gets the same Quake score as a 486 with a DX4-100 (12 FPS) and it said it was the ISA bus video card.

Argued every small detail...

The last thing I said was, what if the ISA card is a Matrox Millenium (IS-STORM), not available in ISA but technically possible to make. Using the mini GL driver with GLquake. ISA bus clock of 20 MHz.

It said at 320x200, 30 fps, the ISA bus would be saturated, the CPU would do the texture processing,.. but the ISA bus would still be the bottleneck and not the memory bus differences between 386 and 486.

Obviously if you're using VLB/PCI, the 486 is faster. But interesting that ISA cards are a bigger bottleneck...

There are 386 boards with VLB. VLB card on 386 has negligible 1 fps speed difference vs ISA in DOOM with 486dlc 🙁 https://www.youtube.com/watch?v=NvVS9KtNr10 12 fps versus 11fps on 486dlc + ISA.
The problem with 386 bus, aka no burst, is every single memory transfer is minimum two cycles. Send address, read data, send address, read data. 486 cuts that in half. Its send address, read 4 data in a row for absolute total minimum of 5 cycles.

gregorem wrote on 2026-05-21, 18:45:

I know Cyrix DLC chips exist, but they might be too fast for many older programs and games, and there’s no easy way to slow them down.

He? a dlc33 for example is more or less a intel sx25

Without turbo, deppend on board,for exanple my dlc33 is equivalent to 286 16mhz, and 12mhz without l1 cache

rasz_pl wrote on 2026-05-29, 22:37:

There are 386 boards with VLB. VLB card on 386 has negligible 1 fps speed difference vs ISA in DOOM with 486dlc 🙁 https://www.youtube.com/watch?v=NvVS9KtNr10 12 fps versus 11fps on 486dlc + ISA.
The problem with 386 bus, aka no burst, is every single memory transfer is minimum two cycles. Send address, read data, send address, read data. 486 cuts that in half. Its send address, read 4 data in a row for absolute total minimum of 5 cycles.

Those TX486DLC's have 1KB cache.

The performance is in the L1 cache x CPU clock for the heaviest instructions, and L2 cache x FSB clock... Once the caches are full, it doesn't need to go to the bus... This is the third time saying this, I've ran a 386 + DX4-100, and a 486 + DX4-100 in the Quake timedemo. Same 12.0-12.5 FPS. Therefore the burst bus does 5% at most.

MikeSG wrote on 2026-05-30, 10:02:

Those TX486DLC's have 1KB cache. The performance is in the L1 cache x CPU clock for the heaviest instructions, and L2 cache x FSB clock... Once the caches are full, it doesn't need to go to the bus...

Dont listen to glue on pizza AI 😀

• 486DLC L1 cache flushes completely every single time _any_ DMA runs, ISA and bus mastering kind. That means floppy access, something like Adaptec AHA-1542 hdd access, but also Sound Blaster fetching samples aka constantly during every single gaming session. This is a curse of 386 CPU Bus not designed with proper Cache invalidation mechanism.
• L2 cache is on motherboard therefore goes thru main CPU Bus. This is that 2x slower than 486 bit.
• 486DLC L1 cache line size is 16bytes meaning loading even one byte forces CPU to fill whole line performing 4 transfers = 4 cycles extra over 486 on everything not in L1 of 486DLC. Normal 386 does single transfers to/from L2 directly.

MikeSG wrote on 2026-05-30, 10:02:

This is the third time saying this, I've ran a 386 + DX4-100, and a 486 + DX4-100 in the Quake timedemo. Same 12.0-12.5 FPS. Therefore the burst bus does 5% at most.

I dont know what that means 🙁 For starters Quake is bad benchmark for anything not Pentium because FPU stalls bottleneck overpower and mask any other differences. What does "386 + DX4-100" even mean?

The difference between burst and no burst can be simulated by changing L2 speed between 3222 and 2111 modes. 486 result on 33MHz bus is ~33% slower L2 access:
3-2-2-2: 32 us/KB
2-1-1-1 24 us/KB
386:
33MHz ~55 us/KB
40MHz ~46 us/KB

And then there is Cyrix 486S which doesnt support Burst despite being 486 plugged into socket 1 Re: Interposer between Cyrix 486 and motherboard Difference between fast Ram and L2 is barely noticeable without Burst support.

rasz_pl wrote on 2026-05-30, 22:03:

[…]
Show full quote

• 486DLC L1 cache flushes completely every single time _any_ DMA runs, ISA and bus mastering kind. That means floppy access, something like Adaptec AHA-1542 hdd access, but also Sound Blaster fetching samples aka constantly during every single gaming session. This is a curse of 386 CPU Bus not designed with proper Cache invalidation mechanism.
• L2 cache is on motherboard therefore goes thru main CPU Bus. This is that 2x slower than 486 bit.
• 486DLC L1 cache line size is 16bytes meaning loading even one byte forces CPU to fill whole line performing 4 transfers = 4 cycles extra over 486 on everything not in L1 of 486DLC. Normal 386 does single transfers to/from L2 directly.

Cache flush is not contant it's 10-50 microseconds, and DMA access is further apart. Hidden Refresh (CPU not stalled during refresh) is available on late 386 boards and makes 5-10% difference.

rasz_pl wrote on 2026-05-30, 22:03:

I dont know what that means :( For starters Quake is bad benchmark for anything not Pentium because FPU stalls bottleneck overpo […]
Show full quote

MikeSG wrote on 2026-05-30, 10:02:

This is the third time saying this, I've ran a 386 + DX4-100, and a 486 + DX4-100 in the Quake timedemo. Same 12.0-12.5 FPS. Therefore the burst bus does 5% at most.

I dont know what that means 🙁 For starters Quake is bad benchmark for anything not Pentium because FPU stalls bottleneck overpower and mask any other differences. What does "386 + DX4-100" even mean?

The difference between burst and no burst can be simulated by changing L2 speed between 3222 and 2111 modes. 486 result on 33MHz bus is ~33% slower L2 access:
3-2-2-2: 32 us/KB
2-1-1-1 24 us/KB
386:
33MHz ~55 us/KB
40MHz ~46 us/KB

And then there is Cyrix 486S which doesnt support Burst despite being 486 plugged into socket 1 Re: Interposer between Cyrix 486 and motherboard Difference between fast Ram and L2 is barely noticeable without Burst support.

A 386DX SIS-Rabbit board with a real 486 socket running a DX4-100 ODP, versus a 486 running the same CPU. Same 12-12.5FPS in Quake.

You can't simulate the difference between burst/no-burst in Quake by changing cache speed and saying "there 33%". Applications are deliberately designed to only use L1 & L2, and rarely go to the memory.

I guarantee if a 386 hybrid had a PODP5v83, versus a 486 with the same CPU they would be within 5-10% again.

MikeSG wrote on 2026-06-01, 11:44:

Cache flush is not contant it's 10-50 microseconds

Flushing whole cache is pretty constant. Write thru cache (like in 486DLC) flush itself doesnt cost anything and doesnt take any time. It simply drops all L1 on the floor and from the very next cycle acts like CPU with empty L1 cache again. Its the refilling L1 that hurts.

MikeSG wrote on 2026-06-01, 11:44:

and DMA access is further apart.
Hidden Refresh (CPU not stalled during refresh) is available on late 386 boards and makes 5-10% difference.

If you are playing even 11KHz sound you have 11000 cache flushes per second, pretty painful on boards not implementing custom Cyrix flush pins. Im sure you remember feipoa testing SXL2-66 Re: Register settings for various CPUs
DOOM w/sound = 3689 = 20.25 fps (FLUSH# enabled)
DOOM w/out sound = 3370 = 22.16 fps. BARB
DOOM w/sound = 4420 = 16.90 fps BARB. flushes cache on every sound blaster DMA access. 20% hit
DOOM w/sound = 13.57 fps. BARB with disabled hidden refresh. another 20% hit
DOOM w/out sound 11.15 fps. Disabled L1

Now on a board using 386 Chipset but supporting 486 CPUs neither of those should be a problem. I would expect full support for 486 selective flush mechanism (flushing only on DMA writes and only affected cache lines). The only differences from "true" 486 chipset should be no burst support, maybe no support for tighter timings, and maybe less efficient memory controller?

MikeSG wrote on 2026-06-01, 11:44:

A 386DX SIS-Rabbit board with a real 486 socket running a DX4-100 ODP, versus a 486 running the same CPU. Same 12-12.5FPS in Quake.

Ah, 386 chipset + 486 cpu, perfect! Now run tests that dont bottleneck on FPU and VGA 😀 Doom might be ok'ish, it does 8bit video writes when drawing columns and VGA will still bottleneck on faster cpu. FastDoom even better as it renders to ram buffer and copies to video in bulk.

I dont recall ever seeing cachechk results from such combo either 🙁 Would be good comparison to 486SXL2 @80Mhz running on (ALi M1429) ECS PANDA 386V which is the opposite of the case we are wondering about, its a 486 chipset on 386 motherboard running Cyrix 486'like using 386 bus :-] 😮
Re: Custom interposer module for TI486SXL2-66 PGA168 to PGA132 - HELP!
486SXL2 @80Mhz + ALi M1429
L2 27 us/KB

MikeSG wrote on 2026-06-01, 11:44:

Applications are deliberately designed to only use L1 & L2, and rarely go to the memory.

How do you write such application? In nineties even geniuses like Abrash and Carmack didnt bother and Quake speeds up linearly all the way to 2MB of L2 and would probably go beyond https://dependency-injection.com/2mb-cache-benchmarks/ Quake codebase is not cache aware, both total size and cache line width were not a factor during development. It was simply too much to worry about data locality when shipping a DOS game in the nineties. Nowadays everyone tries to fit hot path in L1, but even then you cant predict cache sizes. Data oriented programming only became popular with bad/convoluted console architectures where you simply had to worry about data layout to avoid huge latency penalties.

MikeSG wrote on 2026-06-01, 11:44:

I guarantee if a 386 hybrid had a PODP5v83, versus a 486 with the same CPU they would be within 5-10% again.

I could see 10%