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P2B-B JumperFree BIOS

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First post, by mmax

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Hi,

With the help of AI, I was able to recover, modify and make functional the hidden Jumperfree FSB settings for ASUS P2B-B board. The resoldering of JEN wire jumper is not needed.
The package contain also documentation of the modifications. That may be helpful if someone would like to make the same or similar changes to the BIOS of one of the many revisions and variants of the P2B boards. The most suitable would be P2B rev 1.10, becuase of the same PLL clock generator chip.

The attachment bios1.jpg is no longer available
The attachment bios2.jpg is no longer available
The attachment P2B-B_BETA004-JumperFree-mod.zip is no longer available

Reply 1 of 4, by rasz_pl

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Thank you for uploading whole thing instead of just the patch, a lot of learning opportunities inside. I love DEAD_ENDS_AND_LESSONS.md.
Which LLM did you use and how much was it total? How hard did you have to herd the cats? Judging by
gems like "A decompressed offset is not a stable compressed-ROM offset. Recompression changes much of the packed stream." it wasnt all smooth sailing ๐Ÿ˜€
Was it instrumented by disassembler/ghirda/radare2 or did it burn tokens disassembling everything on its own?

From retroweb description https://theretroweb.com/motherboards/s/asus-p2b-b
"Unlike its P2B ATX sibling, this board ships with the JEN jumber hardwired for manual CPU multiplier and bus frequency. By desoldering the wire and replacing it with a normal jumper, it's possible to re-enable the missing "CPU PnP" feature, with multiplier and clock auto-detection and manual adjustment from BIOS. Latest BIOS is recommended for this feature to work correctly."

sounds like this functionality was already there with bios somehow detecting state of JEN jumper? and your patch swaps that for a check of added CMOS setting? Im browsing the files and looking at BIOS code but cant find where the BIOS was originally reading JEN value ๐Ÿ™

01_native_setup_clock_menu.txt

stn+0x021C7..0x021CA (3 bytes)
old: e9 f4 d2
new: 66 b9 1e
stn+0x0239D..0x023A0 (3 bytes)
old: e9 e5 d0
new: 66 bb 00
stn+0x02492..0x02495 (3 bytes)
old: e9 47 d1
new: 66 3d 19

those look backwards/reversed?
original_stn_decompressed.bin looks patched, jump inserted to additional function

248A                 mov     eax, 1
2490 cpuid
2492 jmp loc_E0F5DC
2495 db 6
2496 db 0
2497 db 0
2498 loc_E02498:
2498 jnz short loc_E024AA
249A mov ecx, 33h ; '3'
24A0 rdmsr
24A2 or eax, 40000000h
24A8 wrmsr

patched in function in original bios:
F5DC cmp ax, 611h
F5DF jnz short loc_E0F5F4
F5E1 mov ecx, 1E0h
F5E7 rdmsr
F5E9 and eax, 2
F5ED or al, 4
F5EF wrmsr
F5F1 jmp loc_E024AA
F5F4 loc_E0F5F4:
F5F4 cmp ax, 619h
F5F7 jmp loc_E02498

this patched in function in Original ASUS bios is optionally setting MSR ROB_CR_BKUPTMPDR6 bit 2 which some googling returns as some special sauce optimization https://martin.hinner.info/p6microcode/wiki/microcode "Fast Strings Enable bit.". This particular optimization is only active for the earliest stepping of Pentium Pro so not a big deal, havent looked at others tho.

while your patched final_full_post_hook_stn_decompressed.bin

248A                 mov     eax, 1
2490 cpuid
2492 cmp eax, 619h
2498 loc_E02498:
2498 jnz short loc_E024AA
249A mov ecx, 33h ; '3'
24A0 rdmsr
24A2 or eax, 40000000h
24A8 wrmsr

had the clearly patched in jump removed and code reverted to pre special sauce patch aka deoptimized? did you orchestrate that or did LLM just derp on its own?

---------------------------------

I like all the LLMisms, like how it manually reads cmos when there is dedicated function for it it knows about, but then saves bx on the stack to call that dedicated cmos save just making the code longer for no reason. Its like 2 people who dont speak to each other wrote this 30 line function ๐Ÿ˜€

llm
.code16
.global _start
_start:
pushw %bx

# Clock source selector: CMOS 0x42 bit 7. 0=BIOS, 1=Jumpers.
# Erased CMOS (0xFF) must also skip the multiplier write.
movb $0x42, %al
outb %al, $0x70
jcxz 1f
1:
inb $0x71, %al
cmpb $0xff, %al
je done
testb $0x80, %al
jnz done

bios_mode:
movb $0x4f, %al
outb %al, $0x70
jcxz 2f
2:
inb $0x71, %al
cmpb $0xff, %al
jne 3f
xorb %al, %al
3:
andb $0x0f, %al
movb %al, %bl

movb $0x3a, %al
call 0xea89
andb $0xf0, %al
orb %bl, %al
movb %al, %ah
movb $0x3a, %al
call 0xea92

done:
popw %bx
ret

sub_E0EA89 proc near
out 72h, al
jcxz short $+2
loc_E0EA8D:
in al, 73h
jcxz short $+2
locret_E0EA91:
retn
sub_E0EA89 endp

sub_E0EA92 proc near
out 72h, al
jcxz short $+2
loc_E0EA96:
xchg al, ah
out 73h, al
jcxz short $+2
locret_E0EA9C:
โ€ฆShow last 2 lines
                retn
sub_E0EA92 endp

versus

what human would write
.code16
.global _start
_start:
movb $0x42, %al
call 0xea89
cmpb $0xff, %al
je done
testb $0x80, %al
jnz done

bios_mode:
movb $0x4f, %al
call 0xea89
cmpb $0xff, %al
jne 1f
xorb %al, %al
1:
xchgb %al, %ah
andb $0x0f, %ah

movb $0x3a, %al
call 0xea89
andb $0xf0, %al
orb %al, %ah

movb $0x3a, %al
outb %al, $0x70
jcxz 2f
2:
xchgb %al, %ah
outb %al, $0x71
done:
ret
or rather in sane intel syntax using NASM ๐Ÿ˜€
org 0xf6bf
bits 16

_start:
mov al,0x42
call 0xea89
cmp al,0xff
je done
test al,0x80
jne done

bios_mode:
mov al,0x4f
call 0xea89
cmp al,0xff
jne .L3
xor al,al
.L3:
xchg ah,al
and ah,0xf
mov al,0x3a
call 0xea89
and al,0xf0
or ah,al
mov al,0x3a
out 0x70,al
jcxz .L2
.L2:
xchg ah,al
out 0x71,al

done:
ret
or how it uses extra instruction for no reason to load something into bl. Bad LLM, bad
 post_hook_source_gated_cmos42_jumpers_default.s:
movb %cs:(%si), %al
movb %al, %bl

Of course those little things dont matter, but I like idiosyncrasies like this ๐Ÿ˜€

https://github.com/raszpl/sigrok-disk FM/MFM/RLL decoder
https://github.com/raszpl/FIC-486-GAC-2-Cache-Module (AT&T Globalyst)
https://github.com/raszpl/386RC-16 ram board
https://github.com/raszpl/Zenith_ZBIOS Zenith Z-386 MFM-300 ZBIOS disassembly

Reply 2 of 4, by mmax

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Thank you for a deep analysis.

Im no expert, You could probably make it more optimized.
My knowledge of disassemble ended at university by programming Z80 15 years ago and some decompilation work for cybersecurity competition last 2 years, so to do the changes manually, is over my league.

2 years ago:

To unlock the menu the JEN jumper had to be resoldered and if I did it I was stuck in a loop:
At post screen I got an error , it threw me into the BIOS with message CHECK CPU CORE.
It probably except me to set th eproper multiplier and FSB.
But because the BIOS didnt have the fuctionality to really apply these values, at next boot, I was again thrown into BIOS with error message.

I asked one guy if he could re-enable the functionality of the hidden menu and he realized that the menu is there, but the values are never applied.

few months ago:

I saw another guy modifiying VGA Bioses with help of AI

A month ago:

I gave AI a chance too and Im glad I did.
It was all done by a ChatGPT 5.5 High effort.

I decide to ignore the JEN jumper and made a "BIOS" jumper.

And the whole process wasnt smooth sailing, but when I can chose either "nothing" or "poorly optimized, but working BIOS" modified by LLM, the choice is clear, at least for me.
The strangest thing was that the LLM at first tried for some reason to make its own menu and not use the one alreday there, it worked conceptually, but messed with other things. I one of the fresh chat session, where I carried over the history of the previous sessions, it realized how to make the menu visible without the need of JEN jumper nad from then it was quite good. I had to try several empty spaces where to store the new code and data, but that was expected.
At first I verified the BIOSes in AWARD BIOS edotor, until the LLM get the decompresion and compresion right with all the CRC checks and I also verified it with 86Box emulator. After that I tried on real HW.
I do not have the complete history, but it took like 10 chat sessions used to its length limit to produce it. For one particular bug I used Claude Opus 4.8, because ChatGPS wasnt able to solve it, but that was like 3 messages.
The whole process could take like one week, If i did it at once.
Maybe next time I should ask AI to optimize it as well, but I was happy that it worked, so I didnt tempt my luck ๐Ÿ˜€

Reply 3 of 4, by rasz_pl

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mmax wrote on Today, 15:48:

The strangest thing was that the LLM at first tried for some reason to make its own menu and not use the one alreday there

Yes I saw that im the DEAD_ENDS_AND_LESSONS.md
"## 6. Redraw/direct-print hooks and generic hidden-bit bypasses

Forced redraws, direct text printing and broad hidden-bit bypasses either did
nothing or were overwritten by later page logic.

**Lesson:** use Award's own record callback and hide/show iterator rather than
painting over the screen."

mmax wrote on Today, 15:48:

Maybe next time I should ask AI to optimize it as well, but I was happy that it worked, so I didnt tempt my luck ๐Ÿ˜€

its not that the code it wrote is not optimal, well it is but thats not a big deal just fun to read, but it legit removed real ASUS CPU initialization that was in original BIOS. It somehow found ASUS patches at 21C7 239D 2492, recognized those are special CPU MSR patches, and ripped them out ๐Ÿ˜ฎ seemingly for no reason. I was curious if you had a hand in that or if LLM did that on its own.

https://github.com/raszpl/sigrok-disk FM/MFM/RLL decoder
https://github.com/raszpl/FIC-486-GAC-2-Cache-Module (AT&T Globalyst)
https://github.com/raszpl/386RC-16 ram board
https://github.com/raszpl/Zenith_ZBIOS Zenith Z-386 MFM-300 ZBIOS disassembly

Reply 4 of 4, by mmax

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Thaks for investigation.
I confronted the LLM with your feedback. It deleted that for no obvious reason, also with 3 more additional patches. ๐Ÿ™ It put them back. I will test it in approx. 2 weeks, when I will have access to the motherboard again. I ordered a muliplier unlocked early Celeron 266, to test also if the multiplier changing works.
I will update this thread after the tests.