_digitalbath wrote on 2026-07-29, 18:23:
cyclone3d wrote on 2026-07-29, 17:34:
Soni would want to swap out the 100 and 133 with either the 166 or 200 for testing?
Easy enough to use my USB flasher if something goes wrong.
The first table is at offset 74000h, others following. The first table is what I posted in a previous post. I would try to replace it with the code from the following three tables. The followings tables should be the "slowest" SIP.
There are 4 files in that zip ? NM, the _21F is the first one and is included in the zip.
Since the 1333 is a 133fsb CPU, I would think I would want to replace the 1st and second tables. Probably with the slowest table and then if that works well, try the 166 table to see if that lowers the max fsb for the T-Bird.
Not sure what CPU I am going to test after I get the T-Bird at max fsb... I've got a bunch of different mobile, geode NX, etc. Basically just about everything that I would want to test. We could even add different Duron to the list though I only have a couple and nobody else has bothered with them.
Edit:
Actually, only the first SIP in this BIOS is the faster one. Looks like it is probably based on the CPU type detected. So I only need to replace the first one.
The attachment 8VTAI-stock-sips.jpg is no longer available
Edit2: Actually, trying the first SIP in the second block so it supposedly will apply the 100Mhz SIP, which is supposedly looser timings, in the 133Mhz block. The VIA chipset BIOSes supposedly use the ROMSIP based on the detected stock fsb.
The first one being the only one that is different is suspicious and I am guessing that they did not actually test with T-Bird CPUs at all.