DIY Bios Modding guide Jan Steunebrink k6-2+/3+ 128gb

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Reply 460 of 462, by Oerg866

Posted on Yesterday, 18:07

Oerg866 Online

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Joined: 2008-03-25, 01:25

Hello Jan,

thank you very much for your input!

Oh shoot, I knew I forgot something:

1    ORG offset CODECAVE_ROMCopyright1
2AMDCheck5x86:
3    ; Previous condition holds true, so in case we land here from there
4    ; skip our ammended checks
5    jz short AMDCheck5x86_Exit
6
7    cmp ax, 04E0h                       ; 4E0 = 5x86 Write Through
8    jnz short AMDCheck5x86_Not5x86_WT
9    mov dh, 030h                        ; 4x multi, Green CPU
10    jmp short AMDCheck5x86_SetID 
11
12AMDCheck5x86_Not5x86_WT:
13    cmp ax, 04F0h                       ; 4F0 = 5x86 Write Back
14    jnz short AMDCheck5x86_Exit
15    mov dh, 038h                        ; 4x multi, Green CPU, Write Back
16
17AMDCheck5x86_SetID:
18    mov dl, ((CPU_5X86_STRING_TABLE_INDEX * 2) OR 081h)
19
20AMDCheck5x86_Exit:
21    call CMOS_ApplyCPUFeatureBits
22    retn
23
24CODECAVE_ROMCopyright1 = $

This should properly distinguish between WB and WT now. For the sake of keeping the effort to a minimum, I will refrain from overwriting other bits for now 😁

Best
Eric

EDIT:

1Hidden menu item @ F4A37: STANDARD CMOS SETUP / Daylight Saving
2Hidden menu item @ F58D6: BIOS FEATURES SETUP / Virus Warning
3Hidden menu item @ F596C: BIOS FEATURES SETUP / Boot Up Floppy Seek
4Hidden menu item @ F599E: BIOS FEATURES SETUP / Boot Up System Speed
5Hidden menu item @ F5A66: BIOS FEATURES SETUP / System BIOS Shadow
6Hidden menu item @ F5AE3: BIOS FEATURES SETUP / E0000-E7FFF Shadow
7Hidden menu item @ F5AFC: BIOS FEATURES SETUP / E8000-EFFFF Shadow
8Hidden menu item @ F6236: CHIPSET FEATURES SETUP / MA Drive Capacity
9Hidden menu item @ F629A: CHIPSET FEATURES SETUP / DRAM Write Burst
10Hidden menu item @ F62B3: CHIPSET FEATURES SETUP / Slow Refresh
11Hidden menu item @ F62CC: CHIPSET FEATURES SETUP / Hidden Refresh
12Hidden menu item @ F62E5: CHIPSET FEATURES SETUP / Internal Cache WB/WT
13Hidden menu item @ F637B: CHIPSET FEATURES SETUP / Fast Reset Emulation
14Hidden menu item @ F6394: CHIPSET FEATURES SETUP / Fast Reset Latency
15Hidden menu item @ F63AD: CHIPSET FEATURES SETUP / Latch Local Bus
16Hidden menu item @ F63C6: CHIPSET FEATURES SETUP / Local Bus Ready
17Hidden menu item @ F63DF: CHIPSET FEATURES SETUP / Memory Hole Size
18Hidden menu item @ F63F8: CHIPSET FEATURES SETUP / DMA Clock
19Hidden menu item @ F6411: CHIPSET FEATURES SETUP / Memory Relocation
20Hidden menu item @ F683B: POWER MANAGEMENT SETUP / PM Mode
21Hidden menu item @ F6854: POWER MANAGEMENT SETUP / Break Switch
22Hidden menu item @ F6903: POWER MANAGEMENT SETUP / Auto Doze
23Hidden menu item @ F6935: POWER MANAGEMENT SETUP / Auto Standby

This BIOS has a lot of hidden options. That is inexcusable behavior and needs to be rectified immediately.

Reply 461 of 462, by Oerg866

Posted on Yesterday, 23:07

Oerg866 Online

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Posts: 208
Joined: 2008-03-25, 01:25

If anyone wants to test it, my mod BIOS for the SY-025L is available here, provisionally, because everything may be broken 😀 we'll see

https://github.com/oerg866/TRW-BiosMods/tree/main/SOYO_025L

@Jan:

By the way, my notes are available here: https://github.com/oerg866/TRW-BiosMods/wiki/ … x-hacking-notes

Growing that document is a very slow process because doing is more fun than documenting. :^)

Reply 462 of 462, by Oerg866

Posted on Today, 03:56

Oerg866 Online

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Posts: 208
Joined: 2008-03-25, 01:25

Hello again!

Sorry for the spam 😀

But I think I found another slight bug in this BIOS.

The option for Internal Cache WB/WT is tied to a menu callback for the Chipset Features Setup page:

1BIOS_F:5E28                 MenuItemCallback <offset stru_F62E5, offset loc_F675E>

That function is a little weird:

1BIOS_F:675E MenuChipsetSetup_HandleInternalCacheWBWT: ; DATA XREF: BIOS_F:5E28↑o
2BIOS_F:675E                 cmp     al, 55h ; 'U'
3BIOS_F:6760                 jz      short loc_F6770
4BIOS_F:6762                 call    MenuChipsetSetup_CMOSIsWBCPU_Buggy
5BIOS_F:6765                 jz      short loc_F6772
6BIOS_F:6767                 cmp     al, 14h
7BIOS_F:6769                 jz      short loc_F6770
8BIOS_F:676B                 call    DisableMenuItem
9BIOS_F:676E                 stc
10BIOS_F:676F                 retn

The function this calls goes like this:

1BIOS_F:8E94 MenuChipsetSetup_CMOSIsWBCPU_Buggy proc near
2BIOS_F:8E94                                         ; CODE XREF: BIOS_F:6762↑p
3BIOS_F:8E94                                         ; sub_F8DAD+15↑p ...
4BIOS_F:8E94                 mov     al, 0BDh
5BIOS_F:8E96                 call    ReadCMOSByte_2
6BIOS_F:8E99                 and     al, 7Eh
7BIOS_F:8E9B                 nop
8BIOS_F:8E9C                 nop
9BIOS_F:8E9D                 cmp     al, 24h ; '$'
10BIOS_F:8E9F                 jz      short locret_F8EAB
11BIOS_F:8EA1                 cmp     al, 26h ; '&'
12BIOS_F:8EA3                 jz      short locret_F8EAB
13BIOS_F:8EA5                 cmp     al, 16h
14BIOS_F:8EA7                 jz      short locret_F8EAB
15BIOS_F:8EA9                 cmp     al, 18h
16BIOS_F:8EAB
17BIOS_F:8EAB locret_F8EAB:                           ; CODE XREF: MenuChipsetSetup_CMOSIsWBCPU_Buggy+B↑j
18BIOS_F:8EAB                                         ; MenuChipsetSetup_CMOSIsWBCPU_Buggy+F↑j ...
19BIOS_F:8EAB                 retn
20BIOS_F:8EAB MenuChipsetSetup_CMOSIsWBCPU_Buggy endp

This has some hardcoded CPU IDs that CMOS 3F is checked against, which obviously doesn't work well for us now.

I propose this change:

1    ORG offset MenuChipsetSetup_CMOSIsWBCPU_Buggy
2    mov al, 0BFh
3    call ReadCMOSByte
4    and al, 08h
5    cmp al, 08h
6    retn

This reads CMOS byte 3F instead of 3D and then checks if the WB bit is set.

At least on my 5x86, this works correctly and reveals the menu item when the CPU is ran in WB mode.

Do you agree roughly with this finding / idea?

Thanks a ton!
Eric

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