rasz_pl wrote on Today, 04:00:as far as slops go your p1-connector-map.html isnt the worst. LLM slopped too hard and thinks you will be building whole cache c […]
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as far as slops go your p1-connector-map.html isnt the worst. LLM slopped too hard and thinks you will be building whole cache controller from scratch and is suggesting tracing 486 bus Cache handshake pins 😀 thats idiotic of course, L2 controller is already inside UM82C480. tell LLM :
- chipset type UM82C480 and upload both pdfs from retroweb https://theretroweb.com/chips/2664
- that pesky raszpls repo with cache module as example https://github.com/raszpl/FIC-486-GAC-2-Cache-Module and close enough chipset https://www.bitsavers.org/components/viaTechn … 06MV_199504.pdf so it can figure out what pins are needed and what they do. Pinout wont match from just glancing on mobo pictures (no pin where TAG_Q5 goes on that prticular L2 cache module), but at least grounds and power appear to match so thats a start.
- For example module TAG_WE goes to pin 39 TRWR#, Bank0_OE Bank1_OE are pins 64 65 CROEA# CROEB#, Bank0_A3 Bank1_A3 pins 55 56 CA3A CA3B, VIA chipset can internally remap Bank0_A3 into A2 but your UMC has dedicated pin 54 for CA2 in case you would want to implement single bank (slower) cache - in two bank confix A2 is unused, tagram requires 10 bits meaning you will need two SRAM chips to for it, and so on.
- FIC 486-GAC-2 proprietary cache module - open source reproduction *Completed*
- similar based on previous one https://github.com/wichers/Compaq-Cache-Module-197005-001 and Compaq (197005-001) cache module - open source reproduction
should be enough for a clever clanker to figure all this out
hah yah... It was the last thing I gave "the machine" to ask ... and looked at it.. went neat... and went to bed. And yes, i won't be making anything from scratch.
My hands shake to much Ive come to find out on doing small components. Plus after a surgery, i went from 20/20 vision to ... i dunno, but it aint good.. i lost alot of close up vision 🙁
My hope was existing cache module of some sort... and at worst.. just the "adapter" to make it work is all I wanna do then.
Will be interesting .... biggest issue is gonna be me.... burn out. I have 50 things going on in life and my own dev work for a living.. so gotta make sure I can keep plugging away 😀
Waiting on ram / cpu / sound card / ch375 USB card / new eeprom chip to program for BIOS / new battery + battery holder ... before I mess with this again more..
I have a suite of AI Slop from last few weeks, working with my NEC v30 IBM ps2 ... where I used the CH375 card in it for Networking, serial adapters, keyboard/mouse ... USB Camera! and junk.. plus tools and junk for PicoMEM cards.
Such as improved EMS .. and EMS to XMS ... and other fun stuff .. Using my "dosBridge" project... Makes doing stuff stupid simple now. Also a new CH375 dos driver. All in 1 driver with all the optimizations... and tests out a bit better than FeddyV's ... at least on my NEC V30 8086 😀 ....
https://github.com/jdredd87/DOSBridge
https://github.com/jdredd87/CH375USBTools
https://github.com/jdredd87/CH375
One thing the 486 has been tasked with the past few days is this project...
https://github.com/jdredd87/Wolf3D-V30
I wanted an optimized playable Wolf3d on my V30 box... so I have DosBridge talking to both systems. 486 is used to compile via Borland C , run tests on it... then dosBridge deploys it over to the V30 machine, to run tests on and repeat.
The V30 pumps video into a USB 3.0 capture device.. so DosBridge can even record/take pics/ect of actual video output to get a real eye on it... pretty cool I think .. fun to watch all my machines working together to complete a task.
I wanted real machines..not DosBox emulators involved. So to make sure real results work on real hardware 😀
Anyways... enough rambling...