Hi everyone!

I'd like to share a small project I've been working on: a set of scripts for the Advantech AIMB-742 and PCA-6187 that allows software control of the clock generator, providing both overclocking and underclocking of the FSB and PCI/AGP buses.

The scripts work with Rayer's SMB utility, which accesses the PLL over SMBus. One practical advantage is that this approach can be used under both DOS and Windows, using the appropriate SMB build and meeting its requirements.

Why is this useful for retro gaming?

Overclocking is one use, but I find underclocking particularly interesting: we can slow down the CPU without necessarily slowing down the video bus, and adjust the video bus separately.

This becomes especially useful when combined with slowdown methods that do not rely on ODCM, such as those available in P4Tool. P4Tool provides several performance-control methods for Pentium 4 / NetBurst systems, including uncached operation and Debug Store / BTS techniques.

In my tests, keeping the cache disabled can bring performance down to roughly 486 DX2-50/66 levels. From there, lowering the FSB while keeping PCI/AGP fixed lets us go further down toward 386-class performance, while retaining separate control over video-bus speed.

This gives us some interesting combinations:

• A slow CPU with relatively fast video access.
• A slow CPU with reduced bandwidth to the graphics card.
• A fast CPU with a restricted video bus.
• CPU and bus overclocking to explore the platform's limits.

The goal is to cover a broad range of performance profiles, from 386-class systems onward, using one machine.

This is an approximation of performance rather than exact emulation of the original architectures. Also, changing AGP/PCI clocks does not directly change the graphics card's core or memory clocks: it changes the bus and its transfer bandwidth.

Independent FSB and PCI/AGP settings

The key feature is the ability to decouple PCI/AGP from the FSB.

In the operating mode used by these scripts, they are controlled through separate PLL settings. This means that changing the FSB does not require PCI/AGP to increase or decrease proportionally.

PCI and AGP remain linked to each other, with AGP running at twice the PCI frequency.

There are two groups of scripts:

• FSB83 through FSB250: target FSB frequencies from 83 to 250 MHz, in nominal 1 MHz steps, using the available divider combinations to approximate each target.
• PCI16 through PCI64: target PCI/AGP frequencies from 16/32 to 64/128 MHz. The number in the filename always refers to the target PCI frequency.

For the PCI/AGP scripts, M stays fixed and only N in register 06h changes. The effective granularity used is approximately:

• PCI: 0.667 MHz per step.
• AGP: 1.333 MHz per step.

When a requested frequency cannot be represented exactly, the script uses the next available frequency above it.

For example, PCI17 sets approximately 17.333 MHz PCI / 34.667 MHz AGP.

Installation

Download and extract Rayer's SMB utility.

Then extract the scripts ZIP into the SMB application directory, preserving the AIMB-742 subdirectory. The directory structure should look like this:

1SMB.exe
2AIMB-742\
3    FSB83
4    ...
5    FSB210
6    ...
7    FSB250
8    PCI16
9    ...
10    PCI38
11    ...
12    PCI64

Usage

Run the commands from the directory containing SMB.exe, using the /dbg option.

For a target FSB of 210 MHz:

1SMB.exe /dbg AIMB-742\FSB210

For 38 MHz PCI / 76 MHz AGP:

1SMB.exe /dbg AIMB-742\PCI38

The settings can be applied separately. For example:

1SMB.exe /dbg AIMB-742\FSB210
2SMB.exe /dbg AIMB-742\PCI38

This lets us combine different FSB and PCI/AGP settings, then use P4Tool's slowdown options to fine-tune performance for a particular game or benchmark.

Documentation and implementation challenges

The biggest difficulty is not having an exact, fully confirmed datasheet for the chip fitted to the board.

I've been using the ICS952607 documentation as a reference, but there are still questions about identification and differences between variants. I also encountered discrepancies between the initial calculations, the example tables, and the frequencies reported during testing. This makes it necessary to compare the documentation with observed behavior.

Another peculiarity is that single-byte writes do not work in my tests. What does work is a 16-bit write with the same byte repeated in both halves. For example, to send 31h, I write 3131h.

Current testing status

The script ranges are available experimental settings, not a fully validated operating range.

So far, I've configured 42 MHz PCI / 84 MHz AGP without encountering problems in my tests, although more devices and workloads still need to be checked. Software-reported frequencies should also be distinguished from physical clock measurements.

If anyone has additional documentation for these PLLs, or experience with the AIMB-742 or PCA-6187, I'd be very interested!

I'd especially like to compare results using underclocking together with P4Tool to create useful performance profiles for games from different eras.

A big thank you to Rayer for his wonderful SMB utility! This project would not have been possible without it. Having such a flexible tool available for both DOS and Windows makes exploring this hardware much easier.