Reply 160 of 163, by mwdmeyer
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Couple of interesting things about the 128.
It follows the same pattern as the Matrox engine, where batches return while drawing and the core drains at Lock, Flip, Blt, DestroySurface, and CPU clears.
The 128 register guide confirms CRTC_OFFSET is double-buffered via vblank latching, with bit 30 serving as a hardware flip-pending flag similar to Haswell’s.
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