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First post, by noshutdown

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assume if you have -10 cache and -50 or -60 dram, what are standard timing setting for these fsb? for example, if 40 and 50 fsb uses same timing setting, 50*3 would be faster than 40*4. but if you must use a slower timing for 50fsb, then it should be better to stay with 40*4.

also, for sis and umc chipsets, what pci divider do they use at 40 and 50fsb? /1.5 or /2 or something else?

Reply 1 of 2, by luckybob

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15ns was good for 33mhz-40mhz. 12 is good for 40-50, 10ns for anything faster but it begins to be a real craps-shoot.

cache for 66mhz fsb pentiums was usually rated at 6 or 7.5ns. Also, experience has taught me the TAG ram needs to be capable of running slightly faster.

Once men turned their thinking over to machines in the hope that this would set them free. But that only permitted other men with machines to enslave them. - Reverend Mother Gaius Helen Mohiam

Reply 2 of 2, by feipoa

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noshutdown wrote:

assume if you have -10 cache and -50 or -60 dram, what are standard timing setting for these fsb? for example, if 40 and 50 fsb uses same timing setting, 50*3 would be faster than 40*4. but if you must use a slower timing for 50fsb, then it should be better to stay with 40*4.

It often depends on how much L2 cache is installed and how well your chipset can tolerate the timings. For extreme timings, it also depends on how many RAM DIMMs are installed and if EDO RAM is installed. I have found EDO RAM to be less tolerant of faster timings.

When comparing, for example, a Cyrix 5x86 at the fastest stable settings are:

133 (2x66)
RAM Read Wait: 1
RAM Write Wait: 0
L2: 3-2-2 (512K, singe-banked)

Best stable cachechk read speeds, 512K
L2: 102 MB/s
RAM: 70 MB/s

133 (4x33)
RAM Read Wait: 0
RAM Write Wait: 0
L2: 2-1-1 (single-banked 512K)

Best stable cachechk read speeds, 512K
L2: 93 MB/s
RAM: 50 MB/s

120 (2x60)
RAM Read Wait: 1
RAM Write Wait: 0
L2: 3-2-2 (512K, single-banked)

Best stable cachechk read speeds, 512K
L2: 92 MB/s
RAM: 63 MB/s

120 (3x40)
RAM Read Wait: 0
RAM Write Wait: 0
L2: 2-1-1 on some chipsets and usually only with double-banked 256K L2, and sometimes rarely with single-banked 512K
L2: 3-2-2 on some chipsets with 512K single-banked

Best stable cachechk read speeds, 256K (2-1-1)
L2: 96 MB/s
RAM: 55 MB/s

100 (2x50)
RAM Read Wait: 0
RAM Write Wait: 0
L2: 2-2-2, 3-1-1, or 3-2-2
(forgot which L2 setting was fastet stable, I think it was 2-2-2 for 256K double-banked and 3-2-2 for 512K single-banked)

Best stable cachechk read speeds, 256K (IIRC)
L2: 84 MB/s
RAM: 70 MB/s

This test is just a rough tabulation of performance gain vs. L2/memory timings. Ideally, we'd want to test each new FSB at the same CPU frequency, which isn't really possible except for 4x33 vs 2x66, 3x33 vs 2x50, and 3x40 vs 2x60.

noshutdown wrote:

also, for sis and umc chipsets, what pci divider do they use at 40 and 50fsb? /1.5 or /2 or something else?

40 Mhz, I try to get away with 1:1, but sometimes 1:2/3 is needed, which pretty much defeats the point. If the 4x40 setting at 512K requires a 3-2-2 timing 1:2/3, you are best running it at 3x50

50 MHz I've heard people getting away with 1:1, but I wouldn't recommend it for long-term usage. So 1:2/3.

60/66 MHz 1:1/2.

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