VOGONS


First post, by NJRoadfan

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I am attaching these here in PDF for convenience. SiS used to host these documents on their site, but they are long gone now. Unfortunately they only posted the 85c471 VLB and 85c496/497 PCI datasheets and none of the earlier ones like the ISA 85c401/402 or EISA 85c406/411. Either way, these datasheets are handy for deciphering the advanced chipset configuration options found in many BIOS, most of which is applicable to the older chipsets as well.

If anyone wants the later Pentium chipset datasheets, those are available as well.

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  • Filename
    SiS 471.pdf
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    File comment
    SiS 85c471 Datasheet
    File license
    Fair use/fair dealing exception
  • Filename
    SiS 496-497.pdf
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    1.38 MiB
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    748 downloads
    File comment
    SiS 85c496/497 Datasheet
    File license
    Fair use/fair dealing exception

Reply 1 of 7, by noshutdown

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"Both CPU and PCI clock are supplied clock by external clock generator. CPU clock may varies from 50 MHz to 2 MHz. When the CPU clock frequency is lower than or equal to 33MHz, the PCI clock frequency is equal to CPU and when the CPU clock frequency is higher than 33 MHz., the PCI clock frequency is half of CPU clock."
-page41

Reply 2 of 7, by Anonymous Coward

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I read that too....but I think we are reading too much into it. I think it just means that the PCI clock *should* be half CPU clock....not that this process will happen automatically. Since an external clock generator is used, doesn't that kind of imply that it is not a feature of the chipset? All known SiS PCI board with dividers are set that way manually with a jumper.

"Will the highways on the internets become more few?" -Gee Dubya
V'Ger XT|Upgraded AT|Ultimate 386|Super VL/EISA 486|SMP VL/EISA Pentium

Reply 3 of 7, by feipoa

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As I probably already pointed out to Anonymous Coward via PM, I saw no evidence that the SiS chipset has any control over the PCI divider clock. When I ran two different SiS boards at 40 and 50 MHz, I measured the PCI clock freq. with an oscilloscope, however the PCI frequency was not halved. The only way the PCI frequency gets halved is when a jumper near the clock generator chip was switched. Some SiS motherboards don't explicitely say which jumper is the PCI half frequency jumper, but you can figure it out by looking at the jumper configuration for the 50 MHz setting.

Edit: The SiS 496/497 manual also mentions that the Cyrix 5x86 linear burst mode is supported, however the two SiS boards I tested would hang up when linear burst was enabled.

Perhaps this SiS preliminary was in need of revision?

Ultimate 486 Benchmark | Ultimate 686 Benchmark | Cyrix 5x86 Enhancements | 486 Overkill Graphics | Worlds Fastest 486

Reply 6 of 7, by feipoa

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Are any SiS 496/497 boards capable of EDO? The 3 differen't boards I tested were not.

Ultimate 486 Benchmark | Ultimate 686 Benchmark | Cyrix 5x86 Enhancements | 486 Overkill Graphics | Worlds Fastest 486

Reply 7 of 7, by Stiletto

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If anyone wants the later Pentium chipset datasheets, those are available as well.

May as well upload those...

"I see a little silhouette-o of a man, Scaramouche, Scaramouche, will you
do the Fandango!" - Queen

Stiletto