Reply 441 of 469, by suntac
wrote:If someone wants to share my investment, you are welcome. I have some GALs and SAA1099P left over, I could program them for you.
Congratulations, scorp!
Your solution is correct. 😀
There are, however, other issues that need to be addressed too. I'll publish my code shortly.
Here it is:
CHIP SB20CMS 16V8
; Author: suntac at Vogons (Rado M.)
; Version: 2.0
; Date: 22nd December 2018
;
; Description: * fixes issues with the OPL2 and the digital part when used together with the CT1336A BIC
; * improves handling of the reset signal
; * resolves D-type flip-flop timing hazard
; * adds support for disabling the ISA IOCHRDY functionality
/cms1_or_opl=1 /cms2_or_x=2 /cms=3 u14_q2=4 /wr=5 /reset=6 _gnd7=7 _gnd8=8 /ena_iochrdy=9 gnd=10
/u5_u8_dtack=11 nc12=12 iochrdy=13 /u17_cs=14 /u8_cs=15 /u5_cs=16 /u14_set2=17
u14_d2=18 u14_clk2=19 vcc=20
EQUATIONS
; note that pins 7, 8 and 9 are tied to gnd on the PAL socket
; cms1_or_opl = 1 for addresses 2X0h, 2X8h and 388h
; cms2_or_x = 1 for addresses 2X2h and 2X8h
; cms = 1 for addresses 2X0h and 2X2h
; 2X0h = cms * cms1_or_opl
; 2X2h = cms * cms2_or_x
; 2X8h & 388h = /cms * cms1_or_opl
; CMSOFF jumper bridges /cms1_or_opl and /u17_cs (pin 14)
u5_cs = wr * cms * cms1_or_opl * /reset ; CS for first SAA1099P (2X0h-2X1h), wr optional
u8_cs = wr * cms * cms2_or_x * /reset ; CS for second SAA1099P (2X2h-2X3h), wr optional
u17_cs = /u5_u8_dtack * /cms * cms1_or_opl * /reset ; CS for YM3812
/u14_d2 = cms * cms1_or_opl + cms * cms2_or_x ; 74LS74.D[2]
u14_clk2 = wr ; 74LS74.CLK[2]
u14_set2 = u5_u8_dtack + reset ; 74LS74.SET[2]
iochrdy.oe = /u14_q2 * ena_iochrdy * /reset
iochrdy = gnd ; IOCHRDY tristated
Reply 442 of 469, by scorp
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This feels like an old good quest and, funny enough, I tested the CMS by using Monkey Island 😀 Please don't post your code yet, I'm curious about the other issues and would love to tackle them either. I'd love to hear what kind of problems that would be now. Anyway, thank you for letting us know, that there is a solution. I don't know, if I'd invest the time to track down the issue else. However, I hope you support the community a little bit more next time and just open your work for everybody. I mean it is very old and you would not earn a lot of money by closing it down anyway, but you could instantly make a lot of people happy. I think, this is more valuable, then money 😀
My Youtube channel Necroware
Reply 443 of 469, by suntac
wrote:This feels like an old good quest and, funny enough, I tested the CMS by using Monkey Island 😀 Please don't post your code yet, I'm curious about the other issues and would love to tackle them either. I'd love to hear what kind of problems that would be now. Anyway, thank you for letting us know, that there is a solution. I don't know, if I'd invest the time to track down the issue else. However, I hope you support the community a little bit more next time and just open your work for everybody. I mean it is very old and you would not earn a lot of money by closing it down anyway, but you could instantly make a lot of people happy. I think, this is more valuable, then money 😀
I just published the code here: Finally! CMS Upgrade Equations for All SB2.0s
Don't visit the thread until you locate the other issues.
I kept the code closed-source mainly for one reason - to get my eBay seller's feedback from zero to some higher numbers. There are some projects I will be ready to share with the retro-PC community soon. Some of them will be open-sourced, some won't. 😀
Reply 444 of 469, by scorp
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wrote:I just published the code here: Finally! CMS Upgrade Equations for All SB2.0s
Don't visit the thread until you locate the other issues.I kept the code closed-source mainly for one reason - to get my eBay seller's feedback from zero to some higher numbers. There are some projects I will be ready to share with the retro-PC community soon. Some of them will be open-sourced, some won't. 😀
I'm glad, that I could "convince" you to open your work with my own research, however, it makes me a little bit sad, that you did it instantly after I came with a solution. Now nobody will test it and I can't fix anything without that. Don't get me wrong, but I came to the solution without having a working card from another revision, without working PALs or anything else. All I had were two cards from the same "bad" revision with CT1366A, some IC datasheets and the information I found in this forum. That's why it made so much fun to reverse engineer the issue.
But as you can see here, the participation is extraordinary. Except of your comment (thanks by the way), there is not one single feedback. Since your work is now also in the public, nobody would test anything for me and since I have no hardware to do the tests on my own, I can stop my research at this point. Game over. Anyway, my only intention was to bring the knowledge to the community and I got there, despite that I absolutely don't understand the reaction, or absence of it, better to say.
My Youtube channel Necroware
Reply 445 of 469, by suntac
We brought the knowledge to the community, which is nice, but unfortunately the SB 2.0 is a dying horse, so any contribution in that matter won't be popular enough to meet your expectations. 😀
Reply 446 of 469, by SirNickity
You need it tested on a non-A? I might be able to help with that. I have a SB 1.5 and a 2.0 early revision, but I have not had any luck finding a 1336A variant yet. Everything I've seen for sale in the last couple months is the early rev.
I don't have an EEPROM burner yet (haven't gotten around to sourcing one) but I do have a couple of FPGA dev boards, micros, and level translators. I'm sure I can get something to work. Can't promise it'll be right away -- conventions and work travel going on at the moment.
Reply 447 of 469, by scorp
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wrote:You need it tested on a non-A? I might be able to help with that. I have a SB 1.5 and a 2.0 early revision, but I have not had any luck finding a 1336A variant yet. Everything I've seen for sale in the last couple months is the early rev.
I don't have an EEPROM burner yet (haven't gotten around to sourcing one) but I do have a couple of FPGA dev boards, micros, and level translators. I'm sure I can get something to work. Can't promise it'll be right away -- conventions and work travel going on at the moment.
Hi, yes, I have only two CT1336A, but none without "A". But I'm not sure, if you want to test anything, because shortly after I shared my solution suntac decided also to open his, which is definitely better and already tested by himself and many people, who bought his work in the last months on all kind of cards. However, thank you very much for your support and if you still want to test it, please do it. I am still keen to know if it really works everywhere. I'm glad, that beside suntac at least one person more was interested in my results.
My Youtube channel Necroware
Reply 448 of 469, by scorp
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wrote:The closer it is to an 8088 4.77MHz, the better the game sounds. I am curious what causes this behavior, but there is no motivat […]
wrote:hehe 🤣 ok, then I'll have to get one first. That 386sx is the slowest one, I have. However, with turbo off it's around 8088 by 8 MHz, may be it is already enough?!
The closer it is to an 8088 4.77MHz, the better the game sounds.
I am curious what causes this behavior, but there is no motivation to find out.
And my kids prefer to play PoP 1.3 with Roland sound. 😀
As I told, I have an old 386sx and I tested that with turbo off (around 7MHz). I got an awful sound with clicking and pulled notes. I could improve the sound quality by ignoring WR signal when setting the CS. I am a software developer and couldn't leave the software in that shape, so I also cleaned up my code and this is my current state.
CHIP SB20 16V8
; CMS Logic Scheme for Sound Blaster 2.0
; Copyright (C) 2019 by Scorp (Filipp Andjelo)
;
; This program is free software: you can redistribute it and/or modify
; it under the terms of the GNU General Public License as published by
; the Free Software Foundation, version 3.
;
; This program is distributed in the hope that it will be useful, but
; WITHOUT ANY WARRANTY; without even the implied warranty of
; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
; General Public License for more details.
;
; You should have received a copy of the GNU General Public License
; along with this program. If not, see <http://www.gnu.org/licenses/>.
; Version: 20190409
gnd=10 ; Ground
vcc=20 ; +5V
; Input
cs1=1 ; Chip select for the upper SAA1099P or YM3812
cs2=2 ; Chip select for the lower SAA1099P
cs0=3 ; Common chip select
clock=4 ; Clock signal controlled by the D-FlipFlop
wr=5 ; Write signal
reset=6 ; Reset signal
dtack=11 ; Data Transfer Acknowledge from both SAA1099P
; Output
iochrdy=13 ; Tri-Stated I/O CHRDY
cs_opl=14 ; CS of YM3812
cs_cms1=15 ; CS of upper SAA1099P
cs_cms2=16 ; CS of lower SAA1099P
ff_pre=17 ; Preset of the D-FlipFlop
ff_d=18 ; D of the D-FlipFlop
ff_clock=19 ; Clock of the D-FlipFlop
EQUATIONS
cs_opl = /cs0 + cs1
cs_cms1 = cs0 + cs1
cs_cms2 = cs0 + cs2
ff_pre = dtack * reset
ff_d = wr + cs0 + cs1 * cs2
ff_clock = /wr
iochrdy.trst = /clock
iochrdy = gnd
My Youtube channel Necroware
Reply 449 of 469, by suntac
wrote:As I told, I have an old 386sx and I tested that with turbo off (around 7MHz). I got an awful sound with clicking and pulled notes. I could improve the sound quality by ignoring WR signal when setting the CS. I am a software developer and couldn't leave the software in that shape, so I also cleaned up my code and this is my current state.
It is most likely because you didn't fix the problem with the D-type flip-flop and thus the ISA IOCHRDY line is not driven properly. You just shouldn't change the D-input state on the clock's rising edge.
Software developers really shouldn't mess up with the hardware 😀
I am a software architect and a software developer too... and not only that 😁
Reply 450 of 469, by scorp
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wrote:It is most likely because you didn't fix the problem with the D-type flip-flop and thus the ISA IOCHRDY line is not driven prope […]
wrote:As I told, I have an old 386sx and I tested that with turbo off (around 7MHz). I got an awful sound with clicking and pulled notes. I could improve the sound quality by ignoring WR signal when setting the CS. I am a software developer and couldn't leave the software in that shape, so I also cleaned up my code and this is my current state.
It is most likely because you didn't fix the problem with the D-type flip-flop and thus the ISA IOCHRDY line is not driven properly. You just shouldn't change the D-input state on the clock's rising edge.
Software developers really shouldn't mess up with the hardware 😀
I am a software architect and a software developer too... and not only that 😁
Actually, I've studied computer science and digital electronics, so it's not like I would have no idea at all, however I am a software developer through and through and we shouldn't do a lot of stuff, but we just can not keep our hands off 😁
My Youtube channel Necroware
Reply 451 of 469, by suntac
And unfortunately, there are SB2.0 revisions which have the /WR pins of SAA1099 chips grounded.
Reply 452 of 469, by scorp
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wrote:And unfortunately, there are SB2.0 revisions which have the /WR pins of SAA1099 chips grounded.
That would mean, that the FlipFlop would never get its clock. Are you sure? That would mean, that your solution would also have an issue with that.... I have two questions about your schematics, first, what do you mean by ena_iochrdy? On my revision pin 9 is grounded, so how is this relevant for I/O CH RDY? Or is it different on other revisions? And second, on my board pin6 seems to go to a timers reset pin and in my case always zero, I'm not sure about that, but the original equation for pin17 doesn't make a lot of sense for me. This pin6 is still a mistery for me. What is your opinion on that?
By the way, thank you once again, that you share your experience with me, I appreciate this very much.
My Youtube channel Necroware
Reply 453 of 469, by suntac
wrote:That would mean, that the FlipFlop would never get its clock. Are you sure? That would mean, that your solution would also have an issue with that....
Yes, I am sure.
FF clock is not connected to the SAA1099's /WR pin.
FF clock is connected to pin 19 of the GAL which is derived from the /WR line (pin 5 of the GAL).
Please do not mistake pins with lines.
wrote:I have two questions about your schematics, first, what do you mean by ena_iochrdy? On my revision pin 9 is grounded, so how is this relevant for I/O CH RDY? Or is it different on other revisions?
The ena_iochrdy is my "invention" to disable the IOCHRDY functionality in hypothetical emergency cases. You may just bend the pin to disconnect it from the socket.
wrote:And second, on my board pin6 seems to go to a timers reset pin and in my case always zero, I'm not sure about that, but the original equation for pin17 doesn't make a lot of sense for me. This pin6 is still a mistery for me. What is your opinion on that?
Pin 6 of the GAL is the /reset line. It is driven low shortly after the computer is turned on or when the reset button is pressed.
wrote:By the way, thank you once again, that you share your experience with me, I appreciate this very much.
You're welcome.
Reply 454 of 469, by scorp
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wrote:Yes, I am sure. FF clock is not connected to the SAA1099's /WR pin. FF clock is connected to pin 19 of the GAL which is derived […]
wrote:That would mean, that the FlipFlop would never get its clock. Are you sure? That would mean, that your solution would also have an issue with that....
Yes, I am sure.
FF clock is not connected to the SAA1099's /WR pin.
FF clock is connected to pin 19 of the GAL which is derived from the /WR line (pin 5 of the GAL).
Please do not mistake pins with lines.
Oh, yes, sure. That was stupid from me, I overseen somehow, that you are talking about SAA1099s WR, which can be grounded. I see. It would be nice to tinker with different revisions, but, as I told, unfortunately I have only the one.
My Youtube channel Necroware
Reply 455 of 469, by suntac
wrote:Oh, yes, sure. That was stupid from me, I overseen somehow, that you are talking about SAA1099s WR, which can be grounded. I see. It would be nice to tinker with different revisions, but, as I told, unfortunately I have only the one.
It happens sometimes.
I personally own only two revisions, a "Rev 3" with CT1336 and a "060328" with CT1336A, but I have seen an unmarked board which looked very similar to the "Rev 2" and had these /WR pins grounded. That was the only reason why I kept the WR factor in the CMS chip-select equations.
Reply 456 of 469, by scorp
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wrote:wrote:Oh, yes, sure. That was stupid from me, I overseen somehow, that you are talking about SAA1099s WR, which can be grounded. I see. It would be nice to tinker with different revisions, but, as I told, unfortunately I have only the one.
It happens sometimes.
I personally own only two revisions, a "Rev 3" with CT1336 and a "060328" with CT1336A, but I have seen an unmarked board which looked very similar to the "Rev 2" and had these /WR pins grounded. That was the only reason why I kept the WR factor in the CMS chip-select equations.
After a working day I am a bit tired and have to think about that. I still don't get the point of using WR input to calculate the CS signal for the synthesizers. I understand it for the FlipFlop and there I left it, as you see. May be I just need to think about it some time to realize my mistake. Anyway, thank you and it still makes a lot of fun, tackling this thing down. Actually, absolute nonsense, which I'll never use, but it's still a very nice feeling to see it running 😀
My Youtube channel Necroware
Reply 457 of 469, by suntac
WR should never be used for CS in ISA-based designs.
I left it there for maximum compatibility with all SB2.0 revisions.
The more I study the Sound Blaster cards, the more I am aware of their flaws.
Reply 458 of 469, by keropi
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So does this mean that some hardware patching can be done to improve things?
Reply 459 of 469, by suntac
wrote:So does this mean that some hardware patching can be done to improve things?
Yes, exactly! Toss all Sound Blasters into trash and make a new card design from scratch 😁
However, we still like them somehow...