Here is a picture of the board. Contrary to the manufacturer suggestion, the top performance 486-class processor is installed. The PODP-83 is likely faster in most benchmarks, but it misses the 486-class target. The heatsink has been removed for showcasing the processor type.
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The datasheet of the Opti 82c895 has these bullet points about caching modes:
- Direct mapped cache
- Two banks interleaved or single bank non-interleaved
- 64, 128, 256 and 512K cache sizes
- Programmable wait states for L2 cache reads and writes
- 2-1-1-1 read burst and zero wait states write @ 33MHz
- No Valid bit required
- Supports CPUs with L1 write-back support
The jumper description seems to indicate that the board supports three pinout variants: the "classic 486DX pinout", the "PODP pinout" (with write-back control pins on the extra outer rings of pins) and the "Cx486DX" pinout. But wait! Doesn't the Cx486DX include write-back in L1, just like the PODP, just with a different pinout? Does the board support it? Cyrix started to advertise L1 WB on their 486DX series processors with the "Cyrix Writeback" logo on the later Cx486DX2 models, as can be seen on the cpu-world http://www.cpu-world.com/CPUs/80486/Cyrix-Cx486DX2-66.html. Also Cyrix advertised their supposedly enhanced Cache ("FasCache") on Cx486S processors (that's the Intel 80486SX compatible product line) like on this picture http://www.cpu-world.com/CPUs/80486/Cyrix-Cx486S-33-GP.html. No indications of special caching on the Cx486DX processors like in the following picture, though:
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If you run CTCM on this system with the Cx486DX, a cache diagnostics tool by the german IT publisher heise, it will tell you "L1 cache mode: write-through". Performance given by that tool, using the classic instructions like "REP MOVSD" or "REP STOSD" also doesn't indicate any benefits of "L1 write-back" compared to the CMOS setting "L1 write-through". So maybe the imprint is right, and for best (non-PODP-) performance, a Am486 processor will do?
It turns out: No! The board does support L1WB on the Cx486DX (and its Cx486DX2 sibling), whereas there is no support for L1WB on any 5V AMD processor. You can get the correct display of "L1 cache mode: write-back" in CTCM if you disable L2, set maximum RAM wait-states and you install a Cx486DX2 processor. To prove that this is not a mis-diagnosis by CTCM, a counter-check with "L1 cache mode: write-through" in the BIOS setup indeed make CTCM indicate L1 WT again. So the board definitely support L1WB on Cyrix processors. The remaining question is: Does the Cx486DX also operate in write-back mode?
The problem with detecting L1WB on the Cx486DX (without clock-doubling) is caused by the FSB being "fast enough" for most write operations, so that there is no penalty if the L1 cache operates in write-through mode. That's a "Challenge Accepted!" moment for me! I went out to write a program that can detect the write-back mode on the Cx486DX processor reliably, even with zero-waitstate L2 cache writes. And indeed, I found out a performance advantage of the write-back mode in the (quite esoteric) case that program tested. You can find that micro-benchmark tool at https://github.com/karcherm/cx486wb/tree/r1.0, including performance numbers.
End result: This board supports the improved cache of all Cyrix 486 processors (with the original Cyrix 486 Write-Back pinout), it supports the write-back mode of the Intel Pentium Over-Drive processor, but does not support L1WB on the "Enhanced Intel 486DX4 pinout", which is also used on 3.3V Cyrix processor (labelled "standard pinout") and most Am486DX4/5x86 processors. The recommended AMD processors offer no performance advantage over Intel processors. The from a technical view, the AMD recommendation seems flat-out wrong.
