Thank you very much, too! 😁
Personally, I prefer the method where DOS itself sees contingous memory (borrowed from the UMA).
It would allow for several interesting experiments with older software or with old compilers,
that otherwise would run out of memory a bit too soon.
In essence, the usual video framebuffers and Option ROMs do limit that what otherwise would be contingous memory.
Early PCs, like the once popular (-in Europe-) Siruis 1/Victor 9000, had got about 900kiB free to user applications because of this circumstance,
as its video sub system was differently designed. That's why I think CGA and Hercules (or Hercules InColor) are so fascinating, too.
They were *there* (in those days), but don't inherent the same limitations to the user as EGA/VGA do - at least in terms of the framebuffer area/size. 😀

Hello everyone!

Do PCem/86Box now finally support 704K of working RAM ?

- I've found a document from 1985 that claims that 704KB were not unusual in an original IBM PC.

Quote: "THIS DRIVER HAS PRIMARY APPLICATION FOR AN IBM PC-1 WITH
THE ORIGINAL ROM BIOS CHIP. A COMMON CONFIGURATION FOR
THIS MACHINE INCLUDES THE ADDITION OF BOTH 256k AND
384k MEMORY EXPANSION BOARDS. THIS COMBINATION CAN
ALLOW UPTO 704k OF RAM TO BE PHISICALLY INSTALLED.

THE MEMORY MAP OF THE IBM PC SUPPORTS WORKING RAM THRU
640k. THE NEXT TWO 64k BLOCKS ARE RESERVED FOR DISPLAY
ADAPTOR MEMORY. UNLESS AN EXTENDED FUNCTION DISPLAY
ADAPTOR, SUCH AS IBM'S "EGA" IS INSTALLED, THE FIRST 64K
BLOCK OF THIS ADDRESS SPACE CAN BE USED AS WORKING RAM.

THE PC'S POWER ON SELF TEST (POST) WILL ONLY TEST AND
THE AMOUNT OF MEMORY INDICATED BY SYSTEM BOARD SWITCHES.
IN A PC-1, THESE SWITCHES CAN ONLY BE USED TO INDICATE
544k. IN NO MODEL WILL THE POST ALLOW THE INITIALIZATION
OF MEMORY GREATER THAN 640k. ADDITIONALLY, THE POST
MEMORY INITIALIZATION CODE IN A PC-1 IS SLOW!

THIS DRIVER PERMITS SETTING THE PC'S SYSTEM BOARD SWITCHES
TO INDICATE LESS THAT THE ACTUAL AMOUNT OF INSTALLED RAM.
A SWITCH SETTING OF 64k EFFECTS THE FASTEST POSSIBLE
COMPLETION OF THE POST."

Source: RAMSET. ASM ; RAMSET.ZIP archive.
Link: http://annex.retroarchive.org/cdrom/nightowl- … 011A/index.html

UniPCemu's Pentium i430fx configuration can now theoretically use the UMBs as RAM(configurable through the i430fx chipset registers), assuming the OS supports it(through a driver that enables the C000-FFFF blocks to be used as RAM).
But it does require a Pentium to POST at all. Although a plain XT BIOS with any CPU can actually be setup for said configuration. It should theoretically boot (although A20 will be enabled by default).

The x87 instruction set can only be emulated through 80286+ FPU exceptions, though.
And EMS on 80386+ using any memory manager.

Edit: Perhaps UMBPCI will work on the i430fx chipset UniPCemu implements. Although it still won't be able to use the A0000-BFFFF(video adapter) memory area due to it being mapped to be used for SMRAM. Although if it in't locked in the BIOS(it isn't used by the i430fx BIOS I tested it with), you might enable access to said RAM block at the cost of losing access to VRAM(and vice versa, with the exception of code fetches) by toggling it's enable bit.
UniPCemu at least, when the SMRAM window is enabled, will always decode to SMRAM for code fetches and (when enabled) data reads/writes. Disabling the data SMRAM access will cause data fetches to access PCI space instead, addressing the video adapter, if it's mapped there.
So it's theoretically possible to map both VRAM and code/data in that space on the i430fx, assuming the driver that handles it supports said functionality.
With all those enabled, including only the video(32K) ROM and BIOS ROM, for a total of 64K+32K=96K UMA ROM space, it should be able to support up to 640K base and 288K UMA space. If leaving the SMRAM disabled, that's still 160K UMA, so 760K of RAM to play with(928K for including SMRAM).

Thank you very much, I really appreciate it! 😀

The reason why I ask is mainly because of curiosity.
I'd like to test random applications if they are XT compatible in theory.

Especially V20/V30 support would be interesting, because this chips had unique features not found in later x86 processor.

NEC V20 8088 Replacement Processor


What would you pay to upgrade your PC in speed. $400,$500, or even $600? I can
now offer you the NEC V20 8088 chip, complete and ready for installation for a
price well below that. This chip's features include:

(1) Minimum Instruction Time of 250ns
(2) Maximum Addressable Memory - 1 Mb
(3) Abundant Memory Addressing Modes
(4) FULLY IBM 8088 COMPATIBLE (5 MHZ)
(5) 14 x 16 bit register set
(6) 101 Instructions
(7) Instruction set is a superset of the 8086/8088 instruction set
(8) Bit,Byte,Word, and Block operations
(9) Bit field operation instructions
(10) Packed BCD (Binary Coded Decimal) operation instructions
(11) Multiplication/Division instructions execute at 6-8 milliseconds
(12) High speed block transfer instructions (1 Mbytes/sec)
(13) High speed calculation of effective addresses (2 clock cycles/any mode)
(14) Maskable and Non-Maskable Interrupt inputs
(15) IEEE-796 bus compatible interface
(16) FULL 8080 emulation
(17) CMOS technology (saves power consumption)
(18) Standby function


The NEC V20 is a CMOS 16-bit microprocessor with internal 16-bit architecture
and an 8-bit external data bus. The instruction set is a superset of the 8086 /
8088;however, mnemonics and execution times are different. The V20 additionally
has a powerful instruction set including bit processing, packed BCD operations
and high-speed multiplication/division operations. The V20 can also emulate an
8080 and comes with a standby mode that significantly reduces power consumption
and will greatly improve the life of your PC.

Source: V20OFFER.TXT (attached)

Quick update.

I've found a site with an interesting description of the 640k "barrier". 😀
https://www.filfre.net/2017/04/the-640-k-barrier/

Quick update. Found a cool video entitled "How to get more than 640K RAM in a PC or XT".

https://www.youtube.com/watch?v=bdRXqfhpV1Q

Have fun watching! 😃

Jo22 wrote:

Do PCem/86Box now finally support 704K of working RAM ?

86Box should be able to do that if you use one of the emulated memory expansion cards and configure its size and starting address correctly.

Battler wrote on 2021-09-21, 09:40:

Jo22 wrote:

Do PCem/86Box now finally support 704K of working RAM ?

86Box should be able to do that if you use one of the emulated memory expansion cards and configure its size and starting address correctly.

Thank you very much! 😄

Quick update. About two years ago, an interesting YT video was published.

Breaking the DOS 640k barrier on 8086 and 80286 systems
https://www.youtube.com/watch?v=Xcc_D7q9bQs

It explaines quite reasonable why it makes sense to go beyond 640KB.

MartyPC + GLaBIOS

Kudos! Thank you very much! ^^

Quick update. Just noticed that PCem v17 supports 704 KB of RAM for the [8088] Generic XT Clone setting.
While it's not the whole 736 KB that's technically possible under CGA, I think that's fair. 704 KB is neatly aligned to x86 segment borders.

Anyway, just wanted to let you know.
Also thanks to the author for still having included this feature in this final release of old PCem.

I know, making "such a fuss" about those 64 KB of additional memory may seem funny at first glance,
but an XT has no HMA (also ~64KB) like an AT has. So being able to outsource parts of DOS into HMA isn't a choice.

That's why this little extra memory is nice to have.
It allows users to run bigger programs normally, even with a more recent and larger DOS.

Quick update. Found out about another UMB card for XTs, it's the RYBS Electronics HiCard from 1987.
There's a review about it in Micro/Systems Journal July/August 1987, page 42.
https://wiki.preterhuman.net/RYBS_Electronics_HIcard_AMS

Edit: I've attached a low-res snapshot of the review, I hope that's okay.
I find it very informative, because it refers to an 5 years old IBM PC as "vintage computer".
Considering that this review was written in 1987, it's sort of an eye opener, I think.
Because many users I know personally (fellow Germans) do consider something like a PC-10 w/ 512 KB as high-end by late 80s (because of money and self-estem I suppose).
That this obviously wasn't always seen same way back then gives me faith.
It shows that even back then, users were demanding and sophisticated.
That they were using PCs past WordStar and Turbo Pascal 3 (popular for uni).

I did have an idea on extending the Lo-tech 2MB EMS board to 4MB. It simply adds an extra page register and ROM chip. Then the ROM chip with the extra page register enable the A19 address line instead of forcing it to unmap (like on the 2MB EMS boards, where chips 4-7 aren't connected from what I can see on the board schematics. Thus setting the page registers to 80h-FFh unmaps the respective window (really, doesn't drive any memory chip's chip select, thus floating on reads and nothing on writes, thus 'unmapped').

Using a 4th page register with 4MB window (low 4 bits) enable bits and a ROM to patch the upper 4 chips to not respond (based on the respective input RAM[0-3]OE signal from the window decoding, the 4 bits from the added paging register, ISA chip enable from before the memory window decoding chip, CS and OE from the same signal to read the ROM). Then the ROM simply lowers CS for ISA chip enable low, which RAM bit lowered+register bit number to:
- RAM lowered to select the bit in the register.
- Bit in register cleared: low output on enable, ram bit enable, A19 low only. Otherwise high output (disable response).
- Otherwise, ram enable passthrough (4MB window).

Unmapping is done by clearing the bit in the added register and top bit in map register set (like original 2MB board).
And setting the bit for 4MB mode (or legacy clearing the bit with window index below 128) works too that way.

Mapping the register is like the normal registers, but chip enable for address base+4 only instead. That can be done like the existing registers, adding 2 IO map chips as on the Lo-tech board.

Edit: If the ROM isn't fast enough for the RAM chips, the effect could be done using 5 XOR, AND and OR gates (and 30 traces/wires to wire it properly).

It's basically:
(((REG 0-3 OE XORed) AND 4MB register low 4 bits) OR'ed together the 4 resulting lines into one line) XORed to create an disable signal for the upper chips (but not the lower chips), so AND the result with bit 7 from the window register to apply it to the upper 4 chips only, then ORing it onto the RAM-SELECT pin to disable the chip select (reads and writes) and effectively pull up the bus on reads.