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Dual AMD K6 computer

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First post, by Sphere478

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Found a post where a guy claimed to see one in the wild, evidence is low but he claims it was a dual socket 5 or 7 AT board using socket adapters with k6 450s in it running at 400 66x6 I assume. The motherbord reported them as unknown but the operating system showed two graphs in task manager.

Neat read. Wonder if it’s true, he seems convincing.

https://arstechnica.com/civis/viewtopic.php?f=8&t=900386

Last edited by Sphere478 on 2022-08-06, 16:50. Edited 2 times in total.

Sphere's PCB projects.
-
Sphere’s socket 5/7 cpu collection.
-
SUCCESSFUL K6-2+ to K6-3+ Full Cache Enable Mod
-
Tyan S1564S to S1564D single to dual processor conversion (also s1563 and s1562)

Reply 1 of 30, by Sphere478

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Here is the short condensed version of his replies for those on the run

Guys, I'm in a fix. I've a guy coming here tomorrow wanting his NT4 system upgrading to Win2k and all relevant drivers applied. […]
Show full quote

Guys, I'm in a fix. I've a guy coming here tomorrow wanting his NT4 system upgrading to Win2k and all relevant drivers applied.
So far so good.
Then he tells me it's a dual K6-2. I ask him if I heard that right. I did. It used to be a dual P200 MMX, it's now a dual K6-2 400 (66x6).
Now I know that the K6 series were multiprocessor able, but I've never actually seen it being done.
What chipset is it likely to be using and where do I get the drivers from?

Anything to be aware of when installing Win2k onto this?

Anything else?

H@

BobDole, SS7 just meant SDRAM, AGP and 100MHz FSB. I've personally had K6-2s running in old TX motherboards but the board identifies them as K6 rather than K6-2 although the OS does detect the 3DNow! instruction set.
I'll find out tomorrow anyway!
H@

The BIOS reports them as "Unknown (2)" but still allows them to POST. I haven't seen that before. They won't boot if the short memory test is enabled though, it freezes after the memory test completes. Strange.
The clock speed is 400 (66x2 on the mobo)
Strange thing is, they actually work. I was honestly expecting only one CPU to work. The chips themselves are 2.2V 450s and they're in socket adapters with rather meaty heatsinks and really piss poor fans.

Win2k installed without hitch and the system went on it's merry way.

Yes, K6s are multiprocessor capable and they do have bus snooping for cache invalidation. Check AMD's docs.

First time for everything, I suppose.

H@

I'd show you pics if the board was still here. It came in, was installed, and went out the same day.
I didn't recognize the motherboard, nor did I check anything other than that there were two CPU graphs in Task Manager.
From memory, it had no AGP, it had three PCI, three ISA, no USB, AT form factor with the AT power connector next to the parallel port for some strange reason. It ran from SIMMs and had 128MB installed as (32+32)+(32+32). Only four slots were provided.
There was no COAST slot(s), no UDMA (I think) and precious little in the way of the BIOS, which was an AMI BIOS.
Cards installed were a 3Com 509B in the ISA and a 33.6k modem in the ISA. PCI consisted of an S3 Trio64 (735) and a Soundblaster16 PCI.
The SB16PCI also needed replacing, so I installed an Avance ALS4000.

That's all I know.

I should have paid more attention if I'd have known you guys were more interested. Sorry View image: /infopop/emoticons/icon_frown.gif

H@

Phone transcript (from memory, but it wasn't long ago)
ME: "A few guys are really interested in that system you brought in"
HIM: "The dual?"
ME: "Yep. Where did it come from? We can't identify the board."
HIM: "Mark's, about a year ago"

Mark is a guy who runs from a warehouse. He takes computers from businesses that have upgraded and assembles them into "refurbished" models. This is usually taking the RAM out of a 486 and sticking it into a Pentium so it has more than the usual 16MB!

ME: "Okay, any idea where he got it from?"
HIM: "No idea."

I'll try Mark later in the week, I've got a bit of business to do with him anyway.

H@

Sphere's PCB projects.
-
Sphere’s socket 5/7 cpu collection.
-
SUCCESSFUL K6-2+ to K6-3+ Full Cache Enable Mod
-
Tyan S1564S to S1564D single to dual processor conversion (also s1563 and s1562)

Reply 2 of 30, by Sphere478

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According to this some early boards had their own multi processor controllers which may explain how the system this guy found was working.

http://www.vcfed.org/forum/showthread.php?737 … mook-s&p=608177

Sphere's PCB projects.
-
Sphere’s socket 5/7 cpu collection.
-
SUCCESSFUL K6-2+ to K6-3+ Full Cache Enable Mod
-
Tyan S1564S to S1564D single to dual processor conversion (also s1563 and s1562)

Reply 3 of 30, by feipoa

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I've personally had K6-2s running in old TX motherboards but the board identifies them as K6 rather than K6-2

Wasn't the 430TX single processor only?

Plan your life wisely, you'll be dead before you know it.

Reply 4 of 30, by Sphere478

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feipoa wrote on 2021-01-16, 21:40:

I've personally had K6-2s running in old TX motherboards but the board identifies them as K6 rather than K6-2

Wasn't the 430TX single processor only?

Is that quote from the first link?

Yeah, I think so. Maybe they typoed. Maybe they meant hx.

Sphere's PCB projects.
-
Sphere’s socket 5/7 cpu collection.
-
SUCCESSFUL K6-2+ to K6-3+ Full Cache Enable Mod
-
Tyan S1564S to S1564D single to dual processor conversion (also s1563 and s1562)

Reply 6 of 30, by BloodyCactus

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Calling bullshit. K6/K6-2 chips didnt work with the intel SMP protocol because of patents.

The K6 had its own SMP protocol but a chipset was never made for it!

--/\-[ Stu : Bloody Cactus :: [ https://bloodycactus.com :: http://kråketær.com ]-/\--

Reply 7 of 30, by Towncivilian

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The original poster there, Hat Monster, is still active on Ars Technica. You could probably make a post there asking him (or others) to clarify.

abit BX-133 RAID, P3-S 1.4Ghz, 768MB PC133, GeForce FX5200, SB16 ISA, 2x40GB RAID1, Sony SDT-9000 & Connor CTD-8000 SCSI DDS2 DAT drives, 3COM 10/100 NIC, Win2k SP4
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Reply 8 of 30, by Sphere478

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BloodyCactus wrote on 2021-01-17, 00:42:

Calling bullshit. K6/K6-2 chips didnt work with the intel SMP protocol because of patents.

The K6 had its own SMP protocol but a chipset was never made for it!

The more I look into this and I’m no expert it seems he may have used a early dual socket 5 board which apparently had a on motherboard control chip for managing the dual processor stuff and then socket 5 upgrade adapters to make the voltage work. So maybe the extra chip doesn’t care that the cpu has smp or not it does it by it’s self?

It’s sounding plausible though unfortunate how old the boards have to be if it is true.

Last edited by Sphere478 on 2021-01-17, 02:15. Edited 1 time in total.

Sphere's PCB projects.
-
Sphere’s socket 5/7 cpu collection.
-
SUCCESSFUL K6-2+ to K6-3+ Full Cache Enable Mod
-
Tyan S1564S to S1564D single to dual processor conversion (also s1563 and s1562)

Reply 9 of 30, by Sphere478

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Towncivilian wrote on 2021-01-17, 01:12:

The original poster there, Hat Monster, is still active on Ars Technica. You could probably make a post there asking him (or others) to clarify.

I’m. Not on the group. And it sounds like he didn’t actually own the unit. Rather that it was a customer of his nearly 20 years ago. If you are on there can you post and report back?

Sphere's PCB projects.
-
Sphere’s socket 5/7 cpu collection.
-
SUCCESSFUL K6-2+ to K6-3+ Full Cache Enable Mod
-
Tyan S1564S to S1564D single to dual processor conversion (also s1563 and s1562)

Reply 10 of 30, by BloodyCactus

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im longtime on ars and know hat monster through ars, but dont care enough about 20 year old posts to ask him. if it was dual socket 5, that would be a k5, not k6 as k6 was never made in a socket5 variant.

--/\-[ Stu : Bloody Cactus :: [ https://bloodycactus.com :: http://kråketær.com ]-/\--

Reply 11 of 30, by feipoa

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May have been using an interposer to allow for socket7 on socket5.

I think such a non-Intel dual socket 5/7 example would need to have some proprietary SMP controller, like those found in those dual 486 type boards.

Plan your life wisely, you'll be dead before you know it.

Reply 12 of 30, by Sphere478

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feipoa wrote on 2021-01-17, 03:23:

May have been using an interposer to allow for socket7 on socket5.

I think such a non-Intel dual socket 5/7 example would need to have some proprietary SMP controller, like those found in those dual 486 type boards.

Everything I’ve read seems to point to exactly this. I think they used the proprietary smp on some of the early socket 5 boards which is what makes it all work. Since it’s not reliant on the processor to have it’s own. Or at least that’s how I understand it.

Sphere's PCB projects.
-
Sphere’s socket 5/7 cpu collection.
-
SUCCESSFUL K6-2+ to K6-3+ Full Cache Enable Mod
-
Tyan S1564S to S1564D single to dual processor conversion (also s1563 and s1562)

Reply 13 of 30, by rmay635703

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Sphere478 wrote on 2021-01-17, 04:21:
feipoa wrote on 2021-01-17, 03:23:

May have been using an interposer to allow for socket7 on socket5.

I think such a non-Intel dual socket 5/7 example would need to have some proprietary SMP controller, like those found in those dual 486 type boards.

Everything I’ve read seems to point to exactly this. I think they used the proprietary smp on some of the early socket 5 boards which is what makes it all work. Since it’s not reliant on the processor to have it’s own. Or at least that’s how I understand it.

Exactly and the above is why you could have a dual socket 4 which had absolutely no dual support natively

Reply 14 of 30, by Sphere478

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In second reply, the motherboard behind the rumor is described. Any thoughts as to what motherboard that may be?

I’m struggling to find any dual socket 5/7 boards with three isa and three pci that matches the description

Most likely dual socket 5
“no AGP, three PCI, three ISA, no USB, AT form factor with the AT power connector next to the parallel port for some strange reason. SIMMs and had 128MB installed as (32+32)+(32+32). Only four slots were provided.
no COAST slot(s), no UDMA (I think) and precious little in the way of the BIOS, which was an AMI BIOS.”

If I can find the model of it, I’m thinking of trying to get one if I can find one and test the rumor on real hardware. Worst case scenario I end up with a cool dual board…

Sphere's PCB projects.
-
Sphere’s socket 5/7 cpu collection.
-
SUCCESSFUL K6-2+ to K6-3+ Full Cache Enable Mod
-
Tyan S1564S to S1564D single to dual processor conversion (also s1563 and s1562)

Reply 15 of 30, by Anonymous Coward

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My Acer J3 active backplane board has a dual socket4 AMP CPU card. In theory I could use two Powerleap PL-54C/MMX upgrade adapters and run dual K6s, but unfortunately I only have one such adapter and for whatever reason AMD and Cyrix chips don't seem to work on it.

I am kind of skeptical that a Socket5 board would have a custom chip for dual configurations, but if such a board existed it would likely not use an Intel chipset. The most likely chipset would be from OPTi, because I think they were the only mainstream chipset company (at that time) other than intel to experiment with dual CPU (There may have been others for workstation/server class). Actually, the J3 board I mentioned did have a dual socket5 CPU card, but I've never seen one before so I don't know what's on it. Also, my board is VL/EISA...not PCI/ISA.

"Will the highways on the internets become more few?" -Gee Dubya
V'Ger XT|Upgraded AT|Ultimate 386|Super VL/EISA 486|SMP VL/EISA Pentium

Reply 16 of 30, by 0xCats

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Lets put this train to rest.

K5/K6/K6-2/K6-2+/K6-3, basically everything prior to AMD's K7 with the DEC licensed EV6 processor bus lacks both the Signalling pins for SMP and the appropriate LAPIC (Local APIC) functionality inside the core to handle dual CPU Interrupt request handling or the ability to facilitate an external dual CPU IO-APIC or the appropriate message signalled interrupts (MSI).
They also lack the ability to effectively tristate their full address/data bus to effectively operate on a shared bus SMP architecture where two processors have to be able to operate on the same SHARED bus without contention by having an active chip select signal identify the "Bus-active" processor. Essentially Pentium processors have a feature that can tell them to shut-up on the bus while the other processor talks. And they can do this with something called 'tri-stating' their signal lines whereby the chip becomes effectively disconnected from the bus from a sending perspective, but can still sample the signals.

SMP processor boards actually have two operating modes, one of which is the usual multi-socket SMP, the other is the High-Reliability or 'FRC' Functional Redudancy Checking mode. Where one processor acts as the master CPU and the other as a following verifier CPU. They each perform the same operations but while the one CPU writes back data to memory/cache the other CPU samples the bus and compares this to it's own results in register. If the results of the calculation differ it triggers the FRC Error signal which causes an interrupt to be sent and the whole operation is recalculated or the computer turns itself off and hands over computation to another system.

I've looked at this problem extensively both while repairing a dual socket 430NX board and while creating the abomination that is to be a Dual Socket 8 Slot-1 card.

Shared FSB architectures are hard and they have horrible problems as is with servicing memory requests.

AMD did the right thing and ignored them until they could make a point-to-point bus design with EV6.

There are two types of devices, those that know they've been hacked and those that don't yet know they're going to be hacked.

Reply 17 of 30, by Sphere478

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0xCats wrote on 2021-12-03, 09:19:
Lets put this train to rest. […]
Show full quote

Lets put this train to rest.

K5/K6/K6-2/K6-2+/K6-3, basically everything prior to AMD's K7 with the DEC licensed EV6 processor bus lacks both the Signalling pins for SMP and the appropriate LAPIC (Local APIC) functionality inside the core to handle dual CPU Interrupt request handling or the ability to facilitate an external dual CPU IO-APIC or the appropriate message signalled interrupts (MSI).
They also lack the ability to effectively tristate their full address/data bus to effectively operate on a shared bus SMP architecture where two processors have to be able to operate on the same SHARED bus without contention by having an active chip select signal identify the "Bus-active" processor. Essentially Pentium processors have a feature that can tell them to shut-up on the bus while the other processor talks. And they can do this with something called 'tri-stating' their signal lines whereby the chip becomes effectively disconnected from the bus from a sending perspective, but can still sample the signals.

SMP processor boards actually have two operating modes, one of which is the usual multi-socket SMP, the other is the High-Reliability or 'FRC' Functional Redudancy Checking mode. Where one processor acts as the master CPU and the other as a following verifier CPU. They each perform the same operations but while the one CPU writes back data to memory/cache the other CPU samples the bus and compares this to it's own results in register. If the results of the calculation differ it triggers the FRC Error signal which causes an interrupt to be sent and the whole operation is recalculated or the computer turns itself off and hands over computation to another system.

I've looked at this problem extensively both while repairing a dual socket 430NX board and while creating the abomination that is to be a Dual Socket 8 Slot-1 card.

Shared FSB architectures are hard and they have horrible problems as is with servicing memory requests.

AMD did the right thing and ignored them until they could make a point-to-point bus design with EV6.

Sounds pretty straightforward. Could one be designed by utilizing two north bridges somehow?

So it’s 100% that that guy was lying it sounds like. No chance that it may have been some weird setup that used two separate busses?

Sphere's PCB projects.
-
Sphere’s socket 5/7 cpu collection.
-
SUCCESSFUL K6-2+ to K6-3+ Full Cache Enable Mod
-
Tyan S1564S to S1564D single to dual processor conversion (also s1563 and s1562)

Reply 18 of 30, by Anonymous Coward

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Why must it be smp?

"Will the highways on the internets become more few?" -Gee Dubya
V'Ger XT|Upgraded AT|Ultimate 386|Super VL/EISA 486|SMP VL/EISA Pentium

Reply 19 of 30, by cyclone3d

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I have a dual socket 5 SBC and a dual socket 7 motherboard.... I also have a couple of those interposers that came with AMD K6-2 CPUs. I will be trying both of those setups with the AMD CPUs but I have very little hope that they will work in dual CPU mode.

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