First post, by jheronimus
- Rank
- Oldbie
Hi, all!
So, it took me literally six months to restore my Biostar MB-1500PCT motherboard. There were a lot of missing components: both VRMs, four resistors (two for each VRM), an oscillator quartz, a clock generator chip, the BIOS chip, cache chips and the battery. The actual repairs were done by someone far more skillful than myself, but even sourcing some parts was a whole story that took two months and about five trips to the postal office (short version: don't buy goods with non-tracked SpeedPAK shipping).
Now the board is working, but it's kind of slow compared to an earlier Opti-based VLB motherboard from Supermicro I have — despite the OPTi Python chipset being one year newer than OPTi Cobra/Premium. Quake timedemo is about 18 FPS at tightest cache/RAM timings vs 20.7 on Supermicro at default settings (about 23 at tightest) — all with the same Pentium 100 and ARK1000VL videocard. There are no published benchmarks that would confirm one chipset being better than the other. The Python chipset was much less popular than Cobra, but some people on Usenet back in the day believed it to be an updated version. I do suspect that Python is generally worse than Cobra, but I'd like to investigate since there isn't a lot of records about these systems.
Compared to the Supermicro board, the Biostar does seem to have at least two things going for it:
- support for up to two megabytes of write-back cache in two banks with interleave
- support for different VLB speeds (you can switch between 1/2 and 2/3 of the speed bus which gives you theoretical 44MHz instead of stock 33MHz in Supermicro's synchronous mode)
Right now it seems to boil down to cache.
Originally I've set the board up with 256 KBs of cache as per AmoRetro's picture, but then I've decided to try and populate both banks in order to get cache interleaving working.
There are several issues with that.
1) two TAG chip sockets (?)
You can see here that there are 18 DIP sockets for cache.
The UH99 page (I've not been able to find any kind of manual from Biostar) lists the maximum configuration as two banks of 8 chips each + one TAG chip and it doesn't even show the small DIP24 socket under the second bank.
The question is whether or not the DIP24 socket is a second TAG chip, or is it a dirty bit for write-back 386-style? (the cache worked in WB mode without it, though). I know that in some cases a second TAG chip is required to cache more than 64MB of RAM (these boards should support up to 128MB of RAM), but I don't understand why is it not the same kind of socket as the others.
2) the system doesn't boot with 1MB of cache in two banks
At the POST table (the board is using an Award BIOS) the system thinks it 's a 386DX
So I think either I'm using the wrong cache setup or I've set the jumpers wrong.
The setup right now is the following:
Bank o: 4 chips of Winbond 24M512AK-15 + 4 chips of Winbond 24512AK-15
Bank 1: 8 chips of UMC UM61512AK-15
1st TAG chip: UM61256AK-15
So it seems correct in theory: two banks of 8 chips, each is 128Kx8 5V, the TAG is a single 64Kx8. Every chip is rated for 15ns.
I've double checked all the jumpers that are related to cache chips, but there are several jumpers with description I don't understand and that might be related to cache/memory
Buffer type: alone/component — JP26 (it's right in the middle of a lot of different cache-related jumpers)
CPU Speed: 50 MHz or CPU Clock/2. JP3. The board supports 75, 90 and 100MHz Pentiums. So the options are 37.5, 45 and 50 MHz, but could this be FSB? If so, it could affect memory speed.
I should also note that I'm using a BIOS ROM from a different motherboard. Simply couldn't find an original ROM (even contacted Biostar) or a different ROM, this is the only one. It could always be that I'm expecting too much from a board running on a different ROM, but I don't seem to have any ways to fix that at the moment.
So here are some questions I'd like some help with:
1) what is the mysterious chip socket under Bank 1?
2) what do JP3 and JP26 really do?
3) am I using a correct chip combo or is there something wrong with it?
Any help would be really appreciated.



