Reply 20 of 45, by rasz_pl
- Rank
- l33t++
C16
By follow I mean trace tracks 😀 Use strong flashlight if tracks are going into deeper layers, sometimes one can see second layer this way. At that time mobos were only 4 layers with internal layers taken by ground and power, designers rarely (only bad ones or in desperation) routed in inner layers.
You can take more pictures 😀 But better quality, with lots of either light natural or diffused light (bounced off white background) and phone closer to pcb so everything is sharp without reflections or shadows. Both sides front back.
but before we start tracing simple tests
>5V at one side of the header for the reset button, and 5V at powergood at pin 13
>there seems to be only a 100 ohm resistor between the two
Yes, and what happens when you Press RESET button 😀
The way reset is usually implemented is you have Reset header with:
pin 1 linked to ground, either directly or thru small resistor
pin 2 either pulled to 5V with lets say 10Kohm resistor, or connected to a voltage divider (middle of two resists in series) on power supply Powergood output pin 1 (orange cable), and finally that goes to chipset
Now when you press reset you short 1 and 2 and pull chipset powergood to ground, when you release chipset should generate reset on
CPURST 20 O CPU Reset. This signal resets the CPU processor.
SYSRST 63 O Cold Reset. System cold reset.
SYSRSTJ 81 O Cold Reset. The signal is the inversed cold reset.
does this happen?
>5V at powergood at pin 13
means there should be reset happening on those pins when powering on alone
measure resistance to ground of CPURST 20 SYSRST 63 SYSRSTJ 81 (no idea if this one is used in anything, maybe for HDDs)
https://github.com/raszpl/sigrok-disk FM/MFM/RLL decoder
https://github.com/raszpl/FIC-486-GAC-2-Cache-Module (AT&T Globalyst)
https://github.com/raszpl/386RC-16 ram board
https://github.com/raszpl/Zenith_ZBIOS Zenith Z-386 MFM-300 ZBIOS disassembly