Does the device read the DMACK from the motherboard and clear it's DMA bit and mode registers (like Bochs seems to do) when it detects it's high all the time?

So basically when a host controller for IDE drives has DMA disabled (the base address being 0, according to Bochs' PCI DMA interface) the drive would clear those DMA bits and mode registers for the CPU to read during an Identify (Or Identify Packet Device) command?