How does the 16-bit vs 32-bit operand size affect the INVLPG instruction?
Does it just invalidate the page for a byte address in 16-bit and 32-bit operand sizes (the first byte pointed to)?
Or does it invalidate pages for address +1 for word and +2,+3 for 32-bit operand size too?

What would happen if you INVLPG on the final 1, 2 or 3 byte addresses of a page? xxxxx3FF for example (16-bit operand size) on a 4KB page? or xxxxx3FD+ for a 4KB page (both higher on a 2MB/4MB page)?

Edit: OK. according to https://en.wikipedia.org/wiki/X86_instruction_listings it's a m8 operand, so it's always 8-bit operand size.

Then, what happens if the address specified is invalid wrt segmentation (so for example address 15 with a limit (expand-up segment descriptor) of 14)? Does it throw a regular segmentation fault?

Edit: Some digging through Bochs reveals that INVLPG, like MOV CR3, also invalidates the prefetch queue? Is that true?