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x86 VIP flag faulting location amongst simultaneous exceptions?

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First post, by superfury

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At https://xem.github.io/minix86/manual/intel-x8 … 80e0ce-194.html a table is displayed mentioning various fault levels which much occur before other faults.

When is the VIP+VIF being set handled in this? In my implementation it can happen after the Code Breakpoint Fault, so after step 7 (practically a step 7.5 essentially). When does said check happen in real processors (Supporting interrupt virtualization)?

Or does it execute after the instruction is fetched, when starting execution of the new instruction that's read from memory? Basically falling under "Virtualization exception"?

Author of the UniPCemu emulator.
UniPCemu Git repository
UniPCemu for Android, Windows, PSP, Vita and Switch on itch.io

Reply 1 of 1, by superfury

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Also improved inhibition of interrrupts and exceptions to still be linked, but differently:
- Instructions can choose to block either interrupts only or interrupts and exceptions (like single-step) together.
- Blocking interrupts won't block single-step anymore.
- Blocking breakpoint exceptions only happens on a full block, like with POP SS or MOV SS. Not on STI anymore (this is supposed to only block external interrupts, not internal ones).

Author of the UniPCemu emulator.
UniPCemu Git repository
UniPCemu for Android, Windows, PSP, Vita and Switch on itch.io

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