Zak McKracken Tandy sound emulation \ VOGONS

Zak McKracken Tandy sound emulation

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First post, by NewRisingSun

Posted on 2007-05-20, 11:14

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I wonder why nobody has complained about this --- Zak McKracken sounds completely wrong in DosBox' Tandy emulation:

1) The noise channel is totally distorted. Suggestion: don't reset the noise channel when its registers are written to.

2) The square wave frequencies in this intro piece are sometimes way too low. Suggestion: Ignore writes to 0xC0 if the byte written is 0x00. Sounds odd, but totally fixes it in my emulator while (as far as I can tell) not breaking anything else.

Reply 1 of 4, by dh4rm4

Posted on 2007-05-20, 15:32

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How off do the Sierra games sound in 0.7.0?

Reply 2 of 4, by NewRisingSun

Posted on 2007-05-20, 15:37

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Sierra is fine as far as I have checked, except that the higher-frequency notes sound quite dirty, but that's a problem of not generating a properly band-limited signal. Has nothing to do with this.

Lucasfilm's sound routine in Zak and Maniac is quite strange. It seemd to update all the sound registers every single 1/60 sec. frame, even when it's not needed. And of course those garbage 00 port writes.

Reply 3 of 4, by wd

Posted on 2007-05-20, 16:35

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Do you know if those random writes are used as delays or something?
Then it would actually make sense that they have no functionality on
real hardware.

Reply 4 of 4, by NewRisingSun

Posted on 2007-05-20, 16:47

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No, I don't know that. But the chip's data sheet states:

The SN76489AN requires approximately 32 clock cycles to load the data into the control register. The open collector READY output is used to sychronize the microprocessor to this transfer and is pulled to the false state (low voltage) immediately following the leading edge of CE. It is released to go to the true state (external pullup) when the data transfer is completed.

(...)
READY: When active (high), READY indicates that the data has been read. When READY is low, the microprocessor should enter a wait state until READY is high.

I don't know if the Tandy enforces such a wait state based on the READY pin status or not. If not, dummy 00 writes might well serve a delay purpose.

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