Speedsys graph also thinks is has 16Kb L1 cache.

After Intel came out with their 486 CPUS with 16kb L1 cache, AMD followed suite.

cyclone3d wrote:

After Intel came out with their 486 CPUS with 16kb L1 cache, AMD followed suite.

Yes but this is Am486DX4-100SV8B
And the 16Kb version is suppose to be Am486DX4-100SV16B

These chips are quite common. I bet you can run yours with 4x multiplier

I didn't know you could even change multiplier. I thought dx4 are locked 3x and dx2 chips are locked 2x

Baoran wrote:

cyclone3d wrote:

After Intel came out with their 486 CPUS with 16kb L1 cache, AMD followed suite.

Yes but this is Am486DX4-100SV8B
And the 16Kb version is suppose to be Am486DX4-100SV16B

Maybe you've got one from one of the first few runs. Or maybe somebody messed up and had the wrong thing printed on a run of them.

They used 5x86 cores in these.

BastlerMike wrote:

These chips are quite common. I bet you can run yours with 4x multiplier

This is legitimately funny. I need one of these.

Baoran wrote:

I didn't know you could even change multiplier. I thought dx4 are locked 3x and dx2 chips are locked 2x

I doubt that there are regular 486 CPUs where the clock multiplier can be changed. AFAIK the 486 doesn't have pins to set the multiplier like the Pentiums have. And setting the multiplier by software was only possible much later when the first mobile processors offered this functionality.

realoldguy23, see the nice 486 pinout summary in this link:
http://ps-2.kev009.com/eprmhtml/eprmx/h12203.htm
The ones with a CLKMUL pin have it for a reason.

Thanks, gerwin. Didn't know that. I only had a 486DX2/66 at the time, which doesn't have this pin, but the DX4s from Intel and AMD have it. Anyway, the pin only switches between 2 times and 3 times clock multiplying on them (not 4 times as stated above). This time, I'm sure since I googled first and the datasheets are very clear on this. 😉

You are right. Besides that there are the socket 3 upgrade-CPU's:
-AMD Am5x86-P75 with 4x and maybe 3x.
-Cyrix Cx5x86 normally at 3x, and this one is actually software adjustable with the tool in my signature. This is quite suprising, also because the later Cx6x86 does not support such.

realoldguy23 wrote:

Thanks, gerwin. Didn't know that. I only had a 486DX2/66 at the time, which doesn't have this pin, but the DX4s from Intel and AMD have it. Anyway, the pin only switches between 2 times and 3 times clock multiplying on them (not 4 times as stated above). This time, I'm sure since I googled first and the datasheets are very clear on this. 😉

The Amd 586 P75 133mhz runs at 4x 33mhz using the 2x multi setting (''translating'' it internally) it also runs at the 3x setting (which gives 100mhz ofcourse)

The very rare Cyrix 586 133mhz also runs at a 4x setting.

Actually the Intel DX4 supports 3 different clock multipliers via de CLKMUL pin:

• If CLKMUL is left floating or connected to Vcc, you get 3x (default)
• If CLKMUL is grounded, you get 2x
• If CLKMUL is connected to the BREQ pin, you get 2.5x

Source: http://www.informit.com/articles/article.aspx … 30978&seqNum=28

I don't think that is true for all Intel 486 DX4s. This is from the "EMBEDDED WRITE-BACK ENHANCED
IntelDX4™ PROCESSOR" datasheet from October 1995:

And this if from the "Am486® DX4 3-Volt Processor - High-Performance, Clock-Selectable, 3.3 V, 32-Bit Microprocessor" datasheet from July 1995:

It seems AMD even copied the datasheets...

But you never know. A little story on the side, I hope the TO doesn't mind if we deviate a bit from the thread's topic.

I recently acquired a Biostar MB-8500TVX Socket 7 main board. It was designed at a time when MMX processors where announced but not available yet, but it stated it would support them (i.e. providing split voltage support).

I had an AMD K6-200, a P200 non-MMX, and a P200-MMX to try it out. All of them worked, but the P200-MMX was only running at 166MHz, while the other 2 CPUs were running at 200MHz with the same multiplier jumper settings. I suspected that one of the BFx pins of the CPU was defect until I found this:

The board obviously pulled the BF down when the jumpers were set and left them floating when the jumpers were not set. (I confirmed by measuring it btw.) To overcome the limitation with the P200MMX I soldered in 2K2 pull-up resistors to BF0 and BF1 and now my P200MMX runs happily at 200MHz.

I think there were so many CPU types from so many manufacturers during the Socket3 to Socket7 period that it is nearly impossible to know everyone of them. But that's part of the fun, isn't it? 😀