UM8881chipset cacheable memory question \ VOGONS

UM8881chipset cacheable memory question

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First post, by dosgamer

Posted on 2018-11-04, 21:52

dosgamer Offline

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I have a DX4-100 system with an ECS UM8810PAIO board, rev 1.1, Phoenix BIOS 3.2J with 256kB cache (8x32kB) and 32kx8 tag RAM. When I put 64MB EDO in it, both ctcm and cachechk show that only 32MB is being cached, even if I disable write back for the L2 cache in the BIOS. Isn't the UM8881 supposed to be able to cache 64MB when set to write through?

Coppermine Celeron 800 @ 1.12GHz (8x140) - Asus P2B Rev. 1.12 - 256MB PC133 CL2 - Voodoo5 5500 AGP - SB AWE64 CT4520 - Roland SCC-1 - Intel Pro/1000GT - 1.44MB Floppy - ATAPI ZIP 100 - 120GB IDE - DVD-ROM - DVD-R/RW/RAM - Win98SE

Reply 1 of 3, by RetroBoogie

Posted on 2018-11-04, 22:02

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Assuming your RAM all shows up and your cache is good, all I can think of is that some boards set the cache mode when configuring CPU jumpers. Don't know which one it may be, so make sure to check those. Also, are your cache jumpers set to 256kb on your board?

Reply 2 of 3, by dosgamer

Posted on 2018-11-04, 22:10

dosgamer Offline

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Yup, jumpers are set for 256kB and the BIOS also shows 256kB detected. I did have an issue with some other cache chips but the ones that are in there now are working fine.

I'm gonna try the suggestion with the CPU jumpers. The L1 cache is set to WB by jumpers. But is that even related to the L2 cache?

Another thing, ctcm1.6n reports the L2 cache as being set to write back, even though I set it to disabled in the BIOS. Speedsys does show the minor bandwidth drop when disabling write back, though, so I don't know how reliable ctcm is. Are there other programs that can report if the L2 cache is set to WB or WT?

Reply 3 of 3, by moturimi1

Posted on 2018-11-05, 08:23

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dosgamer wrote:
I have a DX4-100 system with an ECS UM8810PAIO board + 64MB EDO in it

Are you sure that the board supports EDO RAM? I guess not.
Please try it with FPM RAM.

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