The Mathco is usually clocked at 2/3 the CPU on 286 boards so the 20Mhz IIT should work just fine. The only ACT boards found do not have the same layout, will keep looking for the manual. FWIW: The 386SX40 based boards are probably the ultimate in 16bit designed PC's, not the 286 based.

Horun wrote on 2020-04-15, 00:58:

The Mathco is usually clocked at 2/3 the CPU on 286 boards so the 20Mhz IIT should work just fine.

Not in the case of this IIT...

The original 80287 uses the CLK frequency directly, or divides it by 3, depending on the state of CKM.
80287XL uses the CLK frequency directly, or divides it by 2, depending on the state of CKM.

Now, to quote "coproc.txt" (What you always wnated to know about math coprocessors V1.5):

The Intel 80287XL, the Cyrix 82S87, and the IIT 2C87 contain the internals of a 387 coprocessor, but are pin-compatible to the o […]
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The Intel 80287XL, the Cyrix 82S87, and the IIT 2C87 contain the internals of
a 387 coprocessor, but are pin-compatible to the original 287. These chips
divide the system clock by two internally, as opposed to three in the
original 80287. Since the 80286 also divides the system clock by two, they
usually run synchronously with respect to the CPU, although they can also be
run asynchronously.

So, no, I can't use it with the 50 MHz crystal.
I suspect I need to install a 20 MHz crystal at X4, and somehow jumper it for the FPU to work asynchronously using X4.

FWIW: The 386SX40 based boards are probably the ultimate in 16bit designed PC's, not the 286 based.

386SX has 32-bit registers, 32-bit ALU, and it's nearly impossible to tell apart from the full 386 in software, therefore I don't include it in the "16-bit" category.

Actually according to the Intel 80286 Hardware Reference manual, section 6 is all about the 80287 and I quote from page: 6-3
"The 80287 Clock Input
The 80287 can operate either directly from the CPU clock or with a dedicated clock. To
operate the 80287 from the CPU clock, the CKM pin of the 80287 is tied to ground. In this
mode, the 80287 internally divides the system clock frequency to operate at one-third the
frequency of the system clock (Le., for an 8 MHz 80286, the 16 MHz system clock is internally
divided down to 5.3 MHz).
To use a higher-performance (10 MHz) 80287, the CKM pin of the 80287 must be tied
high, and an 8284A clock driver and appropriate crystal may be used to drive the 80287
with a 10 MHz, 33% duty-cycle, MOS-Ievel clock signal on the CLK input. In this mode,
the 80287 does not internally divide the clock frequency; the 80287 operates directly from
the external clock."
So in your case with a 50Mhz system clock the 80287 would run at 16.6Mhz if CKM pin is tied to ground. If tied to +5 then you it runs at the cpu clock speed or at a different clock speed if the CLK pin is then tied to that different clock and not the system clock. Internally the 80286 divided the system clock by 2.There is a nice block diagram showing the ties to clocks and the cpu.
So... your board should have a jumper to change the CKM pin and change the NPU clock or else it probably is preset at 1/3 system clock (or same as 2/3 cpu speed).

just because the IIT has the 387 core doesn't necessarily mean that it behaves the same as the 287xl with respect to clocking

maxtherabbit wrote on 2020-04-15, 23:58:

just because the IIT has the 387 core doesn't necessarily mean that it behaves the same as the 287xl with respect to clocking

True. Intel did license IIT as the first for clones of the 80287 iirc (or maybe they were just the first to make a replacement that Intel did not object too) but then it would not be ideal if it did not behave in the same manor since it was to be used on existing 80286 boards in the same 80287 socket. In another topic here one of the l33ts was looking into the diff's of Intel versus IIT and Cyrix 287 and if not mistaken they all used the clocks the same way on those same pins. Will try to find that topic after dinner.

maxtherabbit wrote on 2020-04-15, 23:58:

just because the IIT has the 387 core doesn't necessarily mean that it behaves the same as the 287xl with respect to clocking

Well, according to "coproc.txt" it does behave like 287XL
Also, I have the datasheet from IIT, which states:

"the IIT-2C87 can operate on the same clock as the 80286"

...which suggests CLK division by 2, just like in 287XL

Grzyb wrote on 2020-04-16, 01:00:

Well, according to "coproc.txt" it does behave like 287XL Also, I have the datasheet from IIT, which states: […]
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maxtherabbit wrote on 2020-04-15, 23:58:

just because the IIT has the 387 core doesn't necessarily mean that it behaves the same as the 287xl with respect to clocking

Well, according to "coproc.txt" it does behave like 287XL
Also, I have the datasheet from IIT, which states:

"the IIT-2C87 can operate on the same clock as the 80286"

...which suggests CLK division by 2, just like in 287XL

Can you post your data sheet ? I do have one from IIT but is only a few pages long, am hoping yours has more data. I know they all (287) can run at same speed as the CPU but it also depends on the motherboard and jumpers. I do not think any 286 motherboard was default at 1:1 CPU to NPU clock, most were 2/3 clock unless the jumpers were changed and most of those also had an external clock. Yes "can operate on the same clock" is mentioned because they all can but does your board force that or is it a choice...

Horun wrote on 2020-04-16, 03:54:

Can you post your data sheet ? I do have one from IIT but is only a few pages long, am hoping yours has more data.

I'm afraid we have the same, see the attachment...

Did some tests with this motherboard some time ago. Look here:

Kixs's 286 to the Max

Does any body can help or give advice where i can find AMI BIOS for this board?

https://stason.org/TULARC/pc/motherboards/U/U … 286-EAT-12.html

The DIP switches may be for DRAM bank size and wait state configuration like some older ACT 286 boards.

Switch 4 may be the WS control switch on your board as well. In which case, yours is set to 1WS (switch on = 1WS, off = 0WS). You'll probably need some particularly good 60 ns DRAM to pull off 24 or 25 MHz at 0WS, though, especially with parity enabled. OTOH it should still be faster clocked back to 20 MHz at 0WS than it is at 25 MHz and 1WS.

There's also both the 24 MHz crystal and 50 MHz oscillator present on your board, so that 24 MHz signal may be an optional speed for the FPU (ie 12 MHz) and/or may be used for the slow-mode speed via the turbo switch.

I have an EAT-12 and a similar board with 4 SIPP sockets and 8 DIP-20 sockets and both of those use 24 MHz passive crystals as the main CPU clock source (for 12.0 MHz CPU operation).

Neither of those boards is working right now, though.