VOGONS


First post, by Kahenraz

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All other things being equal, is there any difference to be had in performance between these this kinds of RAM chips on a video card?

The attachment IMG_20210809_182729.jpg is no longer available
The attachment IMG_20210809_182744.jpg is no longer available

Reply 1 of 7, by darry

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Kahenraz wrote on 2021-08-09, 22:31:

All other things being equal, is there any difference to be had in performance between these this kinds of RAM chips on a video card?

IMG_20210809_182729.jpg

IMG_20210809_182744.jpg

It would help if markings were readable on second photo.

It would also help to know what GPU is connected to the RAM on each card .

First photo has 2 HY57V161610D chips with 2 16-bit banks each at 143MHz . So, I would guess two chips afford either 32-bits or maybe 64-bits (if both banks can be accessed simultaneously, which I doubt, but I could be wrong ).

Reply 2 of 7, by Caluser2000

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How can they be the same card if the pcb is obviously different?

There's a glitch in the matrix.
A founding member of the 286 appreciation society.
Apparently 32-bit is dead and nobody likes P4s.
Of course, as always, I'm open to correction...😉

Reply 3 of 7, by Matth79

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In this context, the TC-7 is likely 70nS RAM, while the -10 is more likely 100nS
Now on some cards, it doesn't matter, the chipset has a minimum spec requirement and anything faster has no advantage, while some do have the potential to run faster RAM for more performance.

Looking back, 143MHz rings a bell, sounds like the RAM speed for a Geforce 2MX model - The Creative one with slow DDR, and they DID have choices of RAM speed and type

Reply 4 of 7, by paradigital

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One looks like SDRAM and one SGRAM.

Reply 5 of 7, by mkarcher

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Matth79 wrote on 2021-08-10, 18:41:

In this context, the TC-7 is likely 70nS RAM, while the -10 is more likely 100nS

This is synchronous RAM. The timing no longer signifies the time from RAS to data availability (that's how access time is defined on classic, i.e. non-page-mode, FPM and EDO) RAM, but instead the minimum clock period. It is no longer specified in tens of nanoseconds, but in nanoseconds. So TC-7 is 7ns minimum clock period (143 MHz), and -10 is 10ns minimum clock period (100 MHz). The access time is longer than a single clock cycle, because it takes multiple clocks (RAS-to-CAS delay + CAS latency) from RAS to data availability. IIRC, in PC100-222 SDRAM, the first "2" is the CAS latency and one of the other "2"s is RAS-to-CAS-delay, so the access time is 4 clocks of 10ns, i.e. 40ns.

So -7 RAM allows faster clocks than -10 RAM. This means faster bursts at least, but without looking at the full datasheet, I cant tell wheter access time (from inputting the address to getting the first data) is faster too. If the -7 chip needs 3 cycles latency, and the -10 chip needs just two cycles, access time is about the same.

Reply 6 of 7, by The Serpent Rider

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SGRAM was also optimised to work faster than regular SDRAM. Kinda like old VRAM vs regular DRAM on more old video cards.

I must be some kind of standard: the anonymous gangbanger of the 21st century.

Reply 7 of 7, by rasz_pl

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https://www.ardent-tool.com/tech/memory/vrmsgrm.pdf

SGRAM Features
8-column Block Write and Write-per-Bit modes.
Block write permits you to write the data stored in
the Color Register to eight consecutive memory
locations or columns in a single cycle. Mask data
stored in the Mask Register coupled with Write-perBit (WPB)
mask data present at the inputs (DQs) are used to mask
specific bits and prevent them from being written.

good for planar graphic modes (old/obsolete) and 1bit per pixel color depth (stencil buffers/shadows).

https://github.com/raszpl/FIC-486-GAC-2-Cache-Module for AT&T Globalyst
https://github.com/raszpl/386RC-16 memory board
https://github.com/raszpl/440BX Reference Design adapted to Kicad
https://github.com/raszpl/Zenith_ZBIOS MFM-300 Monitor