First post, by eesz34
I recently got a 486 board with a UMC 82C481 chipset and L2 cache and wanted to try MR BIOS on it. In looking at the MR BIOS bundle, I first tried the one listed as:
UMC_UM82C481BF UMC UM82C481BF 1.44
and it works, but it appears to leave external cache disabled with no way to change it in the setup. Looking at other files for this chipset there's:
V002B406 OPTi WriteThru 82C481 - 486 WriteThru 1.65
V002B408 OPTi WriteThru 82C481 - 486 WriteThru (CL-) 1.65
V002B409 OPTi WriteThru 82C481 - 486 WriteThru (CL+) 1.65
I'm thinking perhaps the three above enable cache because of their description. V002B406 is half the size of the others, and the original AMIBIOS, so I'm going to ignore that one. But what is CL- and CL+? Is it CAS Latency?