Reply 20 of 174, by feipoa
- Rank
- l33t++
Skip, thank you. It looks like the plot has thickened.
The PAL revisions on yours are the same as mine and both of our units have no FPU, however, your DIP switch settings are still different than mine. Yours is 6:off, 4:on. Mine is 6:on, 4:off. All others are the same. From the 4 photo examples seen, the only commonalities are DIPs 8, 7, 3, and 1. On the two with FPUs and the two without FPUs, the photos suggest that DIP 2 control the activation of the FPU, being that 2:on = w/FPU and 2:off = w/out FPU.
The DIPs which are inconsistent are 6, 5, and 4. Perhaps these set different cache invalidation schemes, or cacheable ranges of memory, etc.
As for the consistent DIPs, 8, 7, 3, and 1 - I bet one of these turns on/off a 2x PLL multiplier on the PCB (there's also an IC on the underside), how else would we get 25 Mhz from a 12 Mhz 286? The Cyrix DLC/SLC doesn't have a multiplier on its dye.
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