snufkin wrote on 2021-11-30, 15:25:
Fingers crossed that the board is actually fine and it was just that incompatible Matrox video card. In case it's useful I had […]
Fingers crossed that the board is actually fine and it was just that incompatible Matrox video card. In case it's useful I had a go a tracing the clock lines using the photo of the back of the board and it looks like at least four clock lines can select which clock source to use, but there's at least one that's always driven by the Chrontel main output. No idea what that means for how the jumpers should be set up. I'm slightly curious about what drives the bus enables for all those PI5C3884. Do they select which socket is connected?
I had a go a sketching it out the clocks (this includes guesses and may not be correct):
Green - 14.318 MHz reference
Yellow - CLK1 output and direct copies
Blue - Selected by jumper between Chrontel and OSC1
Purple - Guessing these are copies of the clock source selected by the jumper
Regarding whether how all the PI5C3884 are wired and enabled, then I can confirm that both BE(A) and BE(B) are shorted to ground (regardless of the JP33 settings) - which are active-low (I.e., always enabled). This goes for all the PI5C3884 on either side of the Socket 5.
I'm sure they have something to do with the split signaling between Socket 4 + 5, so I need to trace the inputs/outputs to the sockets.
Additional, I can confirm that the JP33 is simply bridging Vcc (+5V) to the Gate of the TIP127 PNP Darlington transistor (serving as 3.3V voltage regulator), effectively meaning that it will be disabled (not output 3.3V) since it becomes a positively biased PNP transistor. What is interesting is that pin 1-3 and 2-4 (on JP33) are bridged permanently, so it wouldn't really matter if you put one (1-2) or both jumpers (1-2, 3-4) in place here (as suggested by the printing on the mainboard for P60/P66).
JP5 have something to do with the resistor configuration, so probably a means to adjust the output voltage from TIP127.
The jumper on the other side of the BIOS must be CMOS reset.
I have also confirmed that the Vcc to Socket 5 comes from the "output" of the TIP127 producing 3.3V, but it does not go to Vcc on Socket 4. Vcc (+5V) to Socket 4 is hard wired.
My guess is that I should probe for the CPU CLK pin going through one of the PI5C3884.
These jumpers JP1, JP2 and JP3 goes straight to BF0, BF1 and possibly to NC (future BF2) on Socket 5: