The manual for the AP7363 Volt Regulator recommends to place 10uF's on both sides as close as possible to 5v-in and 3v-out to "ensure stability". So I'm going that route, and placing a few 0.1uFs on specific pins.

I'll post results in a few weeks.. I want to order & test it before posting photos/renders.

Tony359 may be featuring the interposer in a video soon, heads up.

This is my version of the interposer.

It's designed to be compatible with the TI486SXL, TI486SXL2, and potentially Intel & AMD 486SX, 486SX2 with jumper changes.

Updated 6 June 2024. To be built & tested 20-30 June 2024. Gerber files for PCB manufacture will be attached after testing.

Images attached: 3D renders and the 168pin press-fit socket.

PCB design requirements:
Length: 52.324
Width: 46.736
Layers: 4
Material: FR-4. 2.0mm thick PCB
Min track/spacing: 6mil / 0.15mm
Min hole size: 0.4mm
Edge connector: no
Finished copper: 1oz
Inner copper: 1oz
Vias: No blind/buried vias present

Bill Of Materials (BOM):
Resistors:
-R1, R4, R10, R11 - 20k - Eg. RT0805DRD0720KL
-R5, R6, R7, R8, R9 - 2.2k Thin Film (<=0.5% tolerance) - Eg. RT0805BRD072K2L
-R3 - 4.42k Thin Film (<=0.5% tolerance) - Eg. RT0805BRD074K42L
-R2, R12 - 100r 0.5W Thick Film - Eg. CRCW0805100RFKEAHP
Capacitors:
-C1 - 10uF Tantalum 3216 - Eg. 293D106X9016A2TE3 Vishay
-C2, C3, C4 - 3.3uF Tantalum 3216 Eg. 293D335X9016A2TE3 Vishay
-C5-C15 - 0.1uF Ceramic 2012 Eg. C0805C104K5RACTU
VR: AP7363-SP-13 (SO-8EP)
IC1-CLK: 74LVC2G74 (SOT-505-2)
XU1: 132pin 550-10-132-14-071101
XU2: 168pin press-fit 546-83-168-17-101136

Sockets are only available from mouser at a high price. I didn't want to hand-solder rows, so the 132pin is a complete socket, and the 168pin is a press-fit (image attached). The availability currently is 20 for the 168pin, and 26 for the 132pin sockets, available from 19 April 2024. If they run out you need to wait another four months.
XU1: 132pin (550-10-132-14-071101): https://au.mouser.com/ProductDetail/Preci-dip … vOFry3q6Q%3D%3D
XU2: 168pin press-fit (546-83-168-17-101136): https://au.mouser.com/ProductDetail/Preci-dip … xAJb6r7AQ%3D%3D

Board info:
-Voltage is selected by the solder jumpers on the back. 3.3v, 3.6v, 3.9v, 4.2v, 4.5v, 4.8v (none jumpered). If more than one is jumpered, the lowest jumpered voltage is used.
-Solder pads on reverse side (FLUSH#, MEMW) are optional and connect directly to the TI486SXL CPU.
-NA-SEL#. Default is jumpered 1-2 or No jumper. No jumper = NC and 20k pullup. 1-2 = Connected & 20k pullup. 2-3 = NC and 100r pulldown.
-IC1-CLK is only required if testing a 486SX CPU.
-Underneath the VR (Voltage Regulator), a 5v pad is close-by the three output pins. If the VR isn't used this can be solder-jumpered from 5v in to VR out. Lifting the three input pins on the VR also disables the device internally via an integrated Enable/disable function.
-The VR ground pad underneath the device acts as thermal management and must be soldered if the VR is used.

Solder jumper configuration. To configure/test Intel & AMD 486SX, jumper 486SX options. NMI is the only difference between Intel & AMD:
1) Jumper 3.3v - 4.8v. 5V: Bypass Volt Reg.
2) CLK/CLK2#: Jumper either 486SX, or TI486SXL.
3) BUSY#: 486SX: NC. TI486SXL: 1-2.
4) SUSP#: 486SX: NC. TI486SXL: 1-2.
5) SUSPA#: 486SX: NC. TI486SXL: 1-2.
6) SMADS#: 486SX: NC. TI486SXL: 1-2.
7) PEREQ#: 486SX: NC. TI486SXL: 1-2.
8 ) ERROR#: 486SX: NC. TI486SX): 1-2.
9) NMI#: AM486SX: 2-3. i486SX/TI486SXL: 1-2.
10) MEMW#: 486SX: NC. TI486SXL: optional.
11) FLUSH#: 486SX: May need to connect to ISA bus MEMW. TI486SXL: optional.

Intel/AMD 486DX & 586 may work using AM486SX settings. FERR# and IGNNE# are not connected.

History:
9/10 Jan 2024: Updated solder jumper pads for CPU. Support for AM486SX.
15 Jan 2024: Updated resistor values for voltage selection.
12 Mar 2024: Cosmetic update. Updated note about smaller solder pad on reverse side (see note in 'other info' above).
6 Jun 2024: Fixed PGA-168 drill size. Removed flush circuit, added FLUSH# & MEMW# pads. 3.3uf & 10uf caps are now tantalum. Other fixes. PCB is now 2mm thick.

Ah press fit hey? What a great idea!

As soon as I saw them I thought "okay this is possible now". Redesigned a lot of the board to accomodate the large pins. The pins are rounded and high quality so the connection should be good.

The 74LVC2G74 chip (used as a clock divider to convert CLK2 to CLK) may allow 486DX, 586, POD cpus to work as well, but they should have a separate interposer design. I'm up to 10 pins that needs jumpering to suit them... They have a legacy FERR/ERROR output pin, and an IGNNE pin. So there's possibilities for those.

Very interesting! Love it! Especially the ambition for other chips!

Interesting choice for regulator. 1.5a? Looks like. Little small🤔 at 3.6v that’s a max wattage of 5.4w I don’t recall the TDP of chips in question, but isn’t it right around 5w? 5v chips of course are direct wire, no reg.

I double dare you to get a POD running on this! :p
Fingers crossed!

Neat.
With amd 486sx2-66 this will be a nice upgrade for sure.
But it sounded like you consider DX variant.
How will this work with onboard 387 fpus ?

Sphere478 wrote on 2023-12-31, 17:11:

Interesting choice for regulator. 1.5a? Looks like. Little small🤔 at 3.6v that’s a max wattage of 5.4w I don’t recall the TDP of chips in question, but isn’t it right around 5w? 5v chips of course are direct wire, no reg.

I double dare you to get a POD running on this! :p
Fingers crossed!

The volt reg is very small (~5mm x 4mm x 1.5mm) but the central thermal pad is supposed to be soldered to the PCB which is then used as a heatsink. There's a smaller version (2mm x 3mm x 0.6mm) in a DFN2030-8 package that somehow meets the specs as well... may get warm but they're within spec...

If a 486DX interposer is made the Volt Reg should support up to 2 amps... The DX4-100 uses 1.45 amps. The AM5x86-133 uses 0.9 amps.

Would be interesting to get a POD running.. I don't have one though 🙁

pshipkov wrote on 2023-12-31, 17:33:

But it sounded like you consider DX variant.
How will this work with onboard 387 fpus ?

Still looking through it...

For both 486sx and 486dx onwards the 387 FPU should be removed...

For 486dx & onwards CPUs, there's a legacy FERR# pin that takes the place of the 386 & FPU's ERROR# pin, and a IGNNE# pin (Ignore numeric error) that takes the place of the BUSY# pin.

Some information about it here: https://flylib.com/books/en/3.356.1.157/1/

FERR# may need to connect to IRQ13 (required for the CPU to decode the error), and/or connect FERR# to IGNNE# through a resistor (100r-2k) so that errors activate the ignore. Both are active low but IGNNE has a minimum set up time.

Other option is to not connect FERR# and IGNNE# and to disable FP errors in the FPU registers via a program.

Updated the interposer design above (9 Jan 2024), after double checking AM486SX pins.

NMI# was on the pin next door, so as well as adding TI486SXL/i486SX and AM486SX selection, I changed all 386 specific pins to solder jumpers so they can be completely disconnected.

Intel & AMD 486DX compatible CPUs may work using the AM486SX settings. FERR# and IGNNE# are not connected.

Love it! Keep up the tweaking! Can’t wait to see the results of tests!

https://youtu.be/yVg2pvyYbn0?feature=shared

Interposer featured in a vid.

So what’s the full scoop on scsi and clock doubling.

Has a dma scsi card been discovered that doesn’t have this glitch?

Does it work with CPU internal and/or external cache disabled?

Cache coherency for DMA transfers was being done in different ways through the 386 era

I recommend doing all baseline testing with a 5V PGA-132 TI486SXL2-50. This will rule out any soldering/contact issues. I haven't had any detrimental SCSI DMA issues at 2x with L1 and L2 enabled for which cyrix.exe could not resolve.

Saw this, haven’t dug too deep, anyone know what the extra circuit is?

Sphere478 wrote on 2024-03-20, 14:49:

Saw this, haven’t dug too deep, anyone know what the extra circuit is?

Now that is quite interesting. I've never seem a mod like that. It's an excellent implementation of a minimal mod.

Hm, some 6MHz ceramic resonator and counter that probably divides it to some lower frequency, no idea...
If it would be a PLL for main clk then it would make a sense...

Sphere478 wrote on 2024-03-20, 14:49:

Saw this, haven’t dug too deep, anyone know what the extra circuit is?

I think I saw same cpu + weird interposer on os2museum long time ago