VOGONS


3 (+3 more) retro battle stations

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Reply 2080 of 2154, by pshipkov

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Yes, L2 cache is the main obstacle for 486 overclocking.
The DIP28/32 chips just don't scale well to meet the requirements of 60/66MHz FSB and tight BIOS timings.
It takes quite a bit of time and effort to curate pile of chips into few well working sets.
Time to seriously consider SOJ-to-DIP adapters ...

retro bits and bytes

Reply 2081 of 2154, by CoffeeOne

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gonzo wrote on 2024-03-21, 11:50:
Thank you for all the infos, rasz_pl, maybe this one sentence is the most important for the L2-problem :-) I think, maybe my TAG […]
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rasz_pl wrote on 2024-03-20, 22:37:

you found one set of fast enough SRAMs

Thank you for all the infos, rasz_pl, maybe this one sentence is the most important for the L2-problem 😀
I think, maybe my TAG-module of 12 ns is the problem here.
Today I will test if the L2-cache can be recognized at lower FPS (33/40 MHz).

There is a misunderstanding on your side.
Your tag RAM is most likely faster than the data SRAMs, because it is a 12ns type.
Your ISSI61C1024-10 are either 15ns or 20ns - depending on luck - types.
The ISSI61C1024 5volts 32pin dip, existed in 3 variants 12ns, 15ns and 20ns. So 10ns is 100% re-labelled.
I never have seen a 12ns type of this chip, therefore I assume all that "10ns" chips are either 15 or 20ns.
On the other hand, one faces the same problem, when buying Chinese 15ns types, they can be re-labelled as well, so it's fine to buy the 10ns ones.

That is the reason also why rasz_pl wrote above:
"....
its already active, you would need to experiment with 10ns SRAM chips, cant get those in DIP, requires making SOJ-DIP adapters.
.... "

Reply 2082 of 2154, by pshipkov

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Agreed.
DIP-28/32 SRAM speed ratings are completely meaningless now-a-days.
This topic keeps coming over and over again. We have to establish 2 short sentences answer to it:
Forget the ratings. Trial and error is the only way.

retro bits and bytes

Reply 2083 of 2154, by rasz_pl

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its best to forget about Chinese sources if you want fast SRAMs, go directly to digikey/farnel/tme/etc and buy new. For example
https://www.digikey.com/en/products/detail/in … D-10VXI/1543795 or the 3.3V variant

Open Source AT&T Globalyst/NCR/FIC 486-GAC-2 proprietary Cache Module reproduction

Reply 2084 of 2154, by pshipkov

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How confident you are that they source from trusted suppliers ?
Price is the sole factor for such commodity products.
Asian businesses are well positioned to dominate the field.
It is easy for me to imagine cool-brand western resellers tapping into them.
At least i cannot think for an easy way to distinguish between relabeled 15ns vs 20ns chips, unless you test each and every one of them.
Don't know much about how this market works really, so just thinking out loud here.

retro bits and bytes

Reply 2086 of 2154, by feipoa

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pshipkov wrote on 2024-03-21, 16:51:

Time to seriously consider SOJ-to-DIP adapters ...

Do you have a link for these? What types of male pins are used for DIP socket mating? I recently demonstrated in the 'native PS/2 mouse' thread that any [male] pin thickness more than about 0.25 mm causes some permanent deformation in [female] DIP socket. Even if you used the thinner 0.45 mm thick machine pins for such an adaptor, I don't think you'll get reliable contact if you then put regular [0.25mm] DIP SRAM back into the motherboard. Maybe you can get away with the 0.35 mm thick pins I sourced, but even those show some loss of restoring force to the DIP springs. The thickness of most DIP IC's are usually around 0.25 mm.

rasz_pl wrote on 2024-03-21, 18:22:

its best to forget about Chinese sources if you want fast SRAMs, go directly to digikey/farnel/tme/etc and buy new. For example
https://www.digikey.com/en/products/detail/in … D-10VXI/1543795 or the 3.3V variant

pshipkov wrote on 2024-03-21, 18:16:
Agreed. DIP-28/32 SRAM speed ratings are completely meaningless now-a-days. This topic keeps coming over and over again. We have […]
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Agreed.
DIP-28/32 SRAM speed ratings are completely meaningless now-a-days.
This topic keeps coming over and over again. We have to establish 2 short sentences answer to it:
Forget the ratings. Trial and error is the only way.

I once thought like rasz, but am more in pshipkov's camp now. The kicker for me was when I ordered some modern Cypress branded 32kx8 SRAM at 12 ns. This was maybe 5 years ago. I started doing some testing on my UUD board with tight timings and the Cypress chips weren't up to the task. I grabbed some random UMC 32kx8 chips, rated for only 15 ns, and everything just worked. Thinking maybe there was a dud in the Cypress batch of 8, I swapped them for another Cypress batch of 8, but the issue of system crashes at tight timings remained.

Next I started swapping SRAM modules around, some old 15 ns Winbonds, UMCs, ISSI - some were stable, some were not. I needed to keep swapping until I found a good batch. This issue only occurs at tight timings. Go down to 33 Mhz FSB, and all the SRAM chips work fine.

Later down the road, I ran across the same issue with TSOP and SOJ SRAM chips on my M919 1024K module. I had to swap the chips around to get reliable operation at 60 MHz and 2-1-2 timings, 1ws/0ws. Some of the questionable China sourced modules were the best, while legit looking US/European sourced chips were the worst (3 out of 4). Same situation, if I ran the board at 33 MHz or even 40 MHz, all modules passed at 2-1-2, 0ws/0ws. It is not until you get into the edge of stability that special SRAM curation is needed.

What is the cause of this curiosity? Does it all boil down to response time? Or are things like tiny variations in input/output impedance and transmission line reflections causing it?

Plan your life wisely, you'll be dead before you know it.

Reply 2087 of 2154, by JonF

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pshipkov wrote on 2024-03-21, 16:51:

Time to seriously consider SOJ-to-DIP adapters ...

I have been considering designing some for a while but never got around to it. Has anyone already done this? It seems like the biggest challenge is the width difference of the chips, might have to mount the SOJ chips at the 90 degree angle? Or, mount 4x / 8x chips on one PCB?

Reply 2088 of 2154, by gonzo

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CoffeeOne wrote on 2024-03-21, 18:10:

The ISSI61C1024 5volts 32pin dip, existed in 3 variants 12ns, 15ns and 20ns. So 10ns is 100% re-labelled.

CoffeeOne, you could be absolutely right, I am affraid....

Next tests with the SYL8886-board are done.

1. L2-CACHE

The highest FSB for the recognition of L2 is 40 MHz (at least for the modules I have)!
At FSB 50+60, no L2 is present (apart from one case with 128 KB - but this was not stable in Windows), even with slowest cache-timings of 3-2-3 in BIOS, and regardless of the modules and if it‘s 512 KB or 256 KB.
At this time, no chance for success, but I will test some other modules as soon as I can.

In case of no recognition of L2, there is always the message „Write Back Caching Accelerated“ on the 2-nd POST-page. If L2 is present (at FSB 40), this message is replaced by „XYZ KB L2 Cache Enabled“

2. RADEON-VGA

Yes, a Radeon 9250 can work with this board, too. This is the only Radeon-VGA I have at this time for testing.

Catalyst 4.3, 4.7, 5.2, and Omega 2.6.29 could be installed.

With Catalyst 4.3 and 5.2, more than one loop in Quake I are possible.

With Catalyst 4.7 and Omega 2.6.29, there is a full freeze of the 3D-picture in Quake I at the first or second loop. Sometimes in 2D the picture disappears complete (black screen). Reducing the LDEV# Sampling Point from1 to 2 in BIOS does not help.

The pictures attached are from Catalyst 5.2

The FPS in Quake I and Quake II are for all drivers more or less very similar (+/- 0,2 FPS, a little better with Omega): Quake I: 15,7 FPS, Quake II: 10,8 FPS.

So the performance is much lower compared to the Geforce 2 MX-400 from above.

All test are done without L2-cache (empty sockets), but there is no difference to the Geforce-tests above (because they are done with inactive L2-cache, too).

Maybe I will try Windows 2000 (to be honest I do not like it for a retro-system) the next days, if I found some time.

Just for reference – are they some other 486-systems running a R9250, and are they any Quake-results?

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Reply 2089 of 2154, by gonzo

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feipoa wrote on 2024-03-22, 09:23:

....Winbonds, UMCs, ISSI - some were stable, some were not. I needed to keep swapping until I found a good batch. This issue only occurs at tight timings. Go down to 33 Mhz FSB, and all the SRAM chips work fine.
....It is not until you get into the edge of stability that special SRAM curation is needed.....What is the cause of this curiosity? Does it all boil down to response time? Or are things like tiny variations in input/output impedance and transmission line reflections causing it?

Yes, feipoa, that's the reason for me to think, maybe it is better to let a very fast 486-system with very fast EDO-RAM (like the SYL8888-system here) work completelety without L2-cache installed.

Is the presence of a stable L2 at fastest timings of 2-1-2 or 2-2-2 (and of course with appropriate total amount of RAM regarding to the L2 installed) for such a fast system really always better?

Reply 2090 of 2154, by pshipkov

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@feipoa
Ok, you are seeing it too.
Latency ratings don't matter. Simple as that.
The market is contaminated hard with such chips from who knows where.
Makes it impossible to reason about anything.
Anyhow.

With that said 8ns SOJ SRAM for sure scales better than anything in DIP-28/32 package.
So, it makes sense to leverage that.

@JonF
Single PCB with multiple chips on it will be less useful than individual per-chip PCBs because of two reasons:
- cannot rotate chips around, unless socketed, which implies even bigger surface area, or some vertical structure for the sockets - difficult to imagine that
- different motherboards have different L2 cache layout

The only option i can think of is per-chip PCB with some vertical component for mounting/soldering the SOJ IC. I actually saw a photo of such implementation somewhere. Didn't look pretty, but we are not in the Miss Universe competition.

retro bits and bytes

Reply 2091 of 2154, by feipoa

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There is probably some generality in SRAM timing numbers. pshipkov, have you found any 25 ns rated DIP SRAM modules work better than 15 ns modules? Or is it fair to say that the pickens go between 10-20 ns? Or is it as narrow as 10-15 ns?

I think something like mkarcher's single PCB for all 9 modules, but with SOJ sockets, is the way to go, however the design would need to be adjusted for each motherboard. Still, I wouldn't want to use pins thicker than 0.35 mm. Re: 486 board with UMC 8881E/8886B: The winner is: EDO without L2 (if your only other option is L2 at 3-2-2-2)

Plan your life wisely, you'll be dead before you know it.

Reply 2092 of 2154, by pshipkov

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@gonzo
Getting a 486 system maxed out and fully stable at 180/200mhz can be a frustrating experience.
It is up to you how far you want to take these old components.
As others say - journey is the mission. If you are satisfied today with what you got - leave it there.
Functional L2 cache can be another journey later.

If you cannot get tight l2 cache timings, the system can easily be slower with it.
There is a lengthy thread on that topic by @mkarcher and the rest of the usual suspects.
Take a look, if you didn’t already.

At any rate, you are in the small club now. : )
Welcome.

@feipoa
Will answer your question in more detail tomorrow morning.

retro bits and bytes

Reply 2093 of 2154, by gonzo

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pshipkov wrote on 2024-03-23, 06:56:

@gonzo
There is a lengthy thread on that topic by @mkarcher and the rest of the usual suspects.
Take a look, if you didn’t already.

Thank you, pshipkov (and mkarcher and feipoa and all the rest involved), this thread Re: 486 board with UMC 8881E/8886B: The winner is: EDO without L2 (if your only other option is L2 at 3-2-2-2) is new for me, it answers some questions.

If I have something new to show about the SYL-system, there will be an info the next time.

Reply 2094 of 2154, by pshipkov

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@feipoa
I discard 20/25ns chips entirely for two reasons.
1. It is unlikely somebody relabeled faster chips to slower. So, most likely they are what the label says.
2. Have enough 10-15ns ones to test with.

Within the 10/12/15ns group, both DIP/SOJ, there is no apparent pattern to follow, or at least i didn't notice one.
However, 8ns SOJ SRAM chips are for sure better than the rest.

Agreed with you on standard/tick pins.
At minimum intermediate DIP sockets must be used so the surface mounted ones dont get damaged.

retro bits and bytes

Reply 2095 of 2154, by gonzo

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Next update.

Another board HOT-433 Rev. 1 was able to go into Windows 98 at FSB 66 MHz together with the AMD 486 @ 200 MHz (5 Volt) from above.

Sadly, this board is not stable at this FSB, too – exactly the same problem of very massive drop of the CPU-performance within few minutes in Windows (sometimes immediately after joining Windows). This drop occurs regardless of 1 MB, 512 KB or 256 KB of L2 installed, as well as with no L2 installed (empty sockets). So my theory of stability at higher FSB without L2-cache onboard was wrong!

I tested this board at FSB 60 (180 MHz) and FSB 50 (150 MHz/ 200 MHz), too – and it is still unstable (the same performance-drop)! But, the higher the FSB is, the faster the instability occurs. For example, at FSB 50 MHz, they can be 20-30 minutes, or another restart, causing this problem. In addition, at FSB 60 MHz, this time I used a Cyrix 5x86-120 MHz (as a "normal" Cyrix 486, without any Cx-586-extensions enabled) - the instability persists, so it seems not to be caused by the AMD-CPU, but by the mainboard itself.

Interestingly, this HOT-board, even in Rev. 1, is able to boot with the Geforce 2 MX from above, so it seems to have PCI 2.0 onboard. In addition, it can handle EDO-RAM, too, regardless of having a northbridge designated as „UM8881F 9510 -BTS“ (without an „E“ at the place of „B“). For sure, I tested both RAM-options (FPM and EDO) - there is no effect of the (in)stability.

By the way the SYL8888-board is still not able to handle L2-cache at FSB > 40 MHz (some more test done). This board is not able to work even at slowest cache-timings with some L2-modules used with the HOT-board even at FSB 66 MHz (and recognized there with speedsys) .
And, the SYL-board runs still rock-stable at FSB 50 and 60 MHz without L2-cache.

Reply 2096 of 2154, by gonzo

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BINGO NUMBER 2!

Today I dig out another PC of mine with a rock-stable 486-board with SiS-496-chipset (Zida 4DPS Rev. 1.0), shown and explaned well in this thread: Modern graphics on a 486

And it works with the AMD-486 @ 200 MHz/5V at FSB 66 MHz rock-stable and excellent!

No one hang-up, no one freeze, no one performance-drop of the CPU in Windows (as this was the case until now at FSB 60, too)! As in case of the SYL8888-board, the northbridge of this board is made in 1997,too. Maybe this is the only important thing for stability in both cases, I don‘t know...

I had only to change the installed stable-running AMD-486--CPU @ 180 MHz/5V with the above CPU, and to adjust the DRAM CAS Precharge Time in BIOS from 1 (for FSB 60) to 2 (now FSB 66). That‘s all!

For a CPU-frequence of 200 MHz, compared to the SYL8888-board without L2 at FSB 50 it can be seen, that this system does not take a big advantage from the 66-MHz-FSB, at least not using L2-cache at 3-2-3 (sadly, faster timings lead to system-crach during the booting, so the modules installed here are the limitating factor in this case).

And, it can be seen, that the Voodoo 3-2000 used with the SiS-chipset is not faster in Quake compared to the GeForce 2 MX-400 with the UMC-8881-chipset (maybe faster or no L2-cache on the Zida-board can do something better here).

Therefore, in the nest steps I will try to run the Zida-system:
- without L2-cache
- with L2-cache at better/faster timings, if I can found some appropriate chips

Other results in DOS (no pictures):

Quake I: 20, 7 FPS
DOOM (demo 3): 73,51 FPS (1016 realtics)
3Dbench 1.0c: 101.5
PCPbench /VGAMODE: 28,9

BTW, I was not able to run the Zida-board stable with more than 32 MB of RAM (as the 512 KB of L2 suggest using of 64 MB, too).

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Reply 2097 of 2154, by gonzo

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more pics

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Reply 2098 of 2154, by gonzo

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even more pics

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Last edited by gonzo on 2024-03-29, 09:55. Edited 1 time in total.

Reply 2099 of 2154, by gonzo

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even more pics

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Last edited by gonzo on 2024-03-29, 09:55. Edited 1 time in total.