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Reply 600 of 652, by superfury

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OK. Some more testing using testsuites and double checking using the Bochs source code as proper documentation (the 80386 manuals don't seem to fully specify the RETF (E)SP behaviour for example, nor how the immediate value if used affects it during and after the protected mode logic).
It appears that the increasing of (E)SP happens in all cases, with it also happening on the source stack of the higher privilege level procedure (to get the (E)SP and SS popped).

It did reveal a bug in the call gate system implemented in UniPCemu. When it was performing a RETF from a 16-bit procedure (using common 8086 segmentation logic, so 16-bit RETF (fallback) instructions that's using a 16-bit operand size) it would use various counters to handle the stack in the common 8086+ and 80386+ logic. But those two methods have different bases on their handling of stack pops (due to cycle-accurate handling differing between the two handlers). So it would work properly with 32-bit operand size (as it was using a correct base of 6), but on the 16-bit operand size (using the common 808x CPU logic for the RETF instruction) it would get a wrong base (it's past 6), thus causing the return stack pointer and segment to never be popped and simply assumed already popped into the local CPU buffers for handling. Thus whatever was in those buffers (SP reading buffer, ESP reading buffer and common 16/32-bit SS reading buffer) would be used (SP buffer containing zeroed data, ESP would probably be correct, but I'm not certain that's always the case,.SS would be the correct value for 32-bit RETFD, but SS would get the last 32-bit RETFD when a 16-bit operand size used. And SP for 16-bit operand size RETF would be zeroed or garbage (depending on initialized memory, usually zero (since the CPU structure is initialized with zero-fill))).

Edit: Hiren's boot CD doesn't seem to use inter-privilege RETF or call gates, but it does seem to use same-privilege level RETF in protected mode.

It still crashes unchanged.

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Reply 601 of 652, by superfury

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OK. With the latest improvements to the 32-bit TSS IOPB's limit range checks, I see something interesting happening during phase 2 of the Windows 9x setup:
"An exception 0E has occurred at 0028:c0007292 in Vxd ---. This was called from 0028:C10555BC in VxD ---. It may be possible to continue normally."

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Reply 602 of 652, by superfury

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Fixed 32-bit operand size for far calls. Also implemented changed D/B-bit checks according to Bochs's (E)SP and (E)IP behaviour.
Also fixed 32-bit far calls to behave properly again, when not through call gates.

(E)IP itself doesn't seem to have issues anymore on 80386+, but Windows 95 OSR 2.5 "C" still crashes on it's first boot somehow?

Many (all but the GRP5 FEh undocumented memory 8-bit behaviour and implementations (currrently a NOP for those)) of the missing 808x undocumented opcodes are now implemented, according to multiple sources that document the latest findings on them from reverse-engineering effords by other people.
Edit: And implemented the 8-bit opcode FEh undocumented instructions as well, thus completing the 808x undocumented CPU instructions to be completed (although untested).

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Reply 603 of 652, by superfury

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Hmmm... Running WFW 3.11 in 386 enhanced mode crashes PROGMAN.
But running Windows 3.11 in Standard mode doesn't crash it? Although it can't install because it's seemingly trying to run the installer in MS-DOS mode when it's run on Windows 3.1 in 386 enhanced mode?

Edit: Just found out that although CS is properly committed and reverted when faulting, EIP wasn't. It was resetting it to a previous state, but not entirely to the start of the instruction on faults (think like with interrupts as well as exceptions).

Edit: Improved return point of interrupts now.

EMM386 from Windows 3.1 says something interesting now: "Insufficient memory" !?
How would that even happen?

Windows 3.1 seems to hang on a HLT now (interrupts disabled)?

Edit: Managed to fix EMM386 to load again (an error in fault handling and page fault EIP resets).
Edit: And managed to fix Windows 3.1 to boot again, this time with EMM386 properly loaded! 😁

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Reply 604 of 652, by superfury

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Just found a tiny issue with the LEAVE instruction that caused paging TLB loads on the stack reads not to continue the instruction with the proper ESP register state if the stack pop caused a TLB load to require locking the bus (which TLB loads always do, unless the bus is already locked and owned by the emulated CPU core itself).

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Reply 605 of 652, by superfury

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Oh great. Now with the latest changes, Windows 95 OSR 2.5's first boot fails: Windows Protection Error while initializing device CONFIGMG.

Didn't get that error code before I think? Perhaps APM-related?

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Reply 606 of 652, by superfury

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OK. APM probably works fine I think.

I noticed something odd when running an already installed Windows 95 OSR 2.5 from earlier builds.

It booted up fine. Then once clicking the start menu it kept BSOD-ing at C000E975 (not sure about that first part tho, so more like CxxxE975). So I put up a breakpoint in the page fault handler.

Then tried again and it ran without any issue, being able to shut down Windows without visible issues (APM worked to power off the app's 'power supply' too (quitting the app once shutdown was complete))?

The RTC mode was set to realtime though? Perhaps related (clock ticking at realtime speeds instead of emulated speeds)?

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Reply 607 of 652, by superfury

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Just fixed a i82347 bug where the NMIMASK register was set to mask the wrong causes and could cause an NMI in various cases (due to swapping reset state of register C3h and C4h (register C4h set to 84h and C3h set to 00h). They're now properly set to 84h(for register C3h) and 3Eh(for register C4h).

That's now fixed to work properly (with proper reset values for those register (executed during PCIRST#)).

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Reply 608 of 652, by superfury

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Managed to fix an issue in the new SDL3 port of the common emulator framework. So now sound works properly again on SDL3.
Also went and fixed some issues in sound device connection/disconnection on SDL2/3.

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Reply 609 of 652, by superfury

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OK. With the latest interrupt bugfixes and other CPU improvements (things like improved B-bit handling and D-bit based protected mode handling from the source segment of interrupts, faults and far jump/call/ret and iret instructions) Windows 95 goes wrong during any boot it seems?

It's trying to load an invalid (0004h) segment descriptor that isn't in the LDT now?
The LDT is probably correctly loaded from what I can see (at the 8xxxxxxxh range), so something related is probably going wrong?

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Reply 610 of 652, by superfury

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Managed to fix one other bug exposed by SDL3 (SDL2 somehow doesn't seem to show the bug). There was an issue with multithreaded pointer registration and release that caused the memory allocations for disk write file structure allocations to fail, causing the disk write to fail, for example when an audio thread tries to log things at the same time as the opening of the file, in turn both threads opening a file at the same time, messing up allocation and missing pointer registration for the file closing call to operate correctly.

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Reply 611 of 652, by superfury

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Just fixed an 'issue' where 80286+ GRP4/5 INC/DEC opcodes would check against read accesses first, then check against r/w accesses, instead of only checking against r/w accesses.
This was introduced with the new handling of the GRP4 opcodes (and already invalidly present on GRP5 opcodes).
That would affect the TLBs that are loaded into the CPUs when using paged memory (or protected memory in protected mode as well).

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Reply 612 of 652, by superfury

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Moved both SMI and hardware interrupts(INTA to be exact) from (A)PIC (both use INTA timings right now) to be handled as special <SMI> and <INTA> instructions, instead of being fused into the first instruction after it. That simplifies handling both of them to be like normal instructions and improve searchability in logs.

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Reply 613 of 652, by superfury

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And did the same to <NMI> handling.

Trap flag also now gets ignored if it detects a SMI at the same time, giving <SMI> priority and ignoring the trap flag handling.

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Reply 614 of 652, by superfury

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OK. Just was interested and ran the test386.asm testsuite once again (Pentium II for all emulation support on the Compaq Deskpro 386 architecture).

It ends up at POST 12h. So something is definitely wrong now, in the CPU emulation.

The documentation of test386.asm says: Other memory access faults
Edit: Hmmm... The #UD handler for invalid prefixes (invalid LOCK prefix usage) causes a double #UD fault back to back somehow...
Edit: Hmmm.... Executing the #UD invalid parameter/prefix handler causes it to terminate the instruction incorrectly somehow, skipping the next instruction fetching, skipping right ahead to the execution start of an instruction for #UD exceptions, causing it to start the next instruction incorrectly?
Edit: OK. Fixed all CPU instruction fetching fault handling to properly report the fact to the caller, where the CPU will properly handle it as an execution phase when executing the fault handler using the proper execution phase handler.

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Reply 615 of 652, by superfury

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And the latest bugfix on the 8042's output port (to ignore the bits 4-5 written on i4x0 devices to not trigger IRQs all the time) should fix the spurious 8042 IRQs with nothing buffered.

Now Windows 95 changes behaviour once again, trying to load a GDT entry that's out of range this time instead (it's faulting because it's past the GDTR limit value)?
Edit: Perhaps some kind of stack corruption somehow? Or EBP/ESP getting corrupted or reset when it shouldn't?

The issue here happens somewhere within the loaded kernel space, at C000xxxxh for EIP and slightly ahead for ESP's stack?

Edit: To be sure that the paging unit was functioning correctly, I tried forcibly flushing all paging-related TLBs at every instruction while running the test386.asm testsuite. No differences in execution were found (the testsuite completed correctly).
So the issue is somewhere else?

ModR/M parameters should also check out, as the testsuite uses SMC to check all modr/m inputs. So it can't be a misinterpretation of modr/m addresses?

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Reply 616 of 652, by superfury

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Looking at Windows 9x going wrong, I see something odd. It's faulting on a segmentation load that's out-of-range (in the GDT), but somehow I see it patching some odd variable in memory (looks for a write to [EDX] at the end of the procedure)?

BIU T1 E	0028:c00013bb 8E 44 24 38 mov es,word ss:[esp++38]	RealRAM(r):043c7ed0=13(); RAM(r):043c7ed0=13(); Physical(r):043c7ed0=13(); Paged(r):c13fbed0=13(); RealRAM(r):043c7ed1=02(); RAM(r):043c7ed1=02(); Physical(r):043c7ed1=02(); Paged(r):c13fbed1=02(); #GP fault(00000210)!; Normal(w):c13fbe94=16(); Paged(w):c13fbe94=16(); Physical(w):043c7e94=16(); RAM(w):043c7e94=16(); RealRAM(w):043c7e94=16(); Normal(w):c13fbe95=00( ); Paged(w):c13fbe95=00( ); Physical(w):043c7e95=00( ); RAM(w):043c7e95=00( ); RealRAM(w):043c7e95=00( ); Normal(w):c13fbe96=00( ); Paged(w):c13fbe96=00( ); Physical(w):043c7e96=00( ); RAM(w):043c7e96=00( ); RealRAM(w):043c7e96=00( ); Normal(w):c13fbe97=00( ); Paged(w):c13fbe97=00( ); Physical(w):043c7e97=00( ); RAM(w):043c7e97=00( ); RealRAM(w):043c7e97=00( ); Normal(w):c13fbe90=28((); Paged(w):c13fbe90=28((); Physical(w):043c7e90=28((); RAM(w):043c7e90=28((); RealRAM(w):043c7e90=28((); Normal(w):c13fbe91=00( ); Paged(w):c13fbe91=00( ); Physical(w):043c7e91=00( ); RAM(w):043c7e91=00( ); RealRAM(w):043c7e91=00( ); Normal(w):c13fbe92=00( ); Paged(w):c13fbe92=00( ); Physical(w):043c7e92=00( ); RAM(w):043c7e92=00( ); RealRAM(w):043c7e92=00( ); Normal(w):c13fbe93=00( ); Paged(w):c13fbe93=00( ); Physical(w):043c7e93=00( ); RAM(w):043c7e93=00( ); RealRAM(w):043c7e93=00( ); Normal(w):c13fbe8c=bb(»); Paged(w):c13fbe8c=bb(»); Physical(w):043c7e8c=bb(»); RAM(w):043c7e8c=bb(»); RealRAM(w):043c7e8c=bb(»); Normal(w):c13fbe8d=13(); Paged(w):c13fbe8d=13(); Physical(w):043c7e8d=13(); RAM(w):043c7e8d=13(); RealRAM(w):043c7e8d=13(); Normal(w):c13fbe8e=00( ); Paged(w):c13fbe8e=00( ); Physical(w):043c7e8e=00( ); RAM(w):043c7e8e=00( ); RealRAM(w):043c7e8e=00( ); Normal(w):c13fbe8f=c0(À); Paged(w):c13fbe8f=c0(À); Physical(w):043c7e8f=c0(À); RAM(w):043c7e8f=c0(À); RealRAM(w):043c7e8f=c0(À); Normal(w):c13fbe88=10(); Paged(w):c13fbe88=10(); Physical(w):043c7e88=10(); RAM(w):043c7e88=10(); RealRAM(w):043c7e88=10(); Normal(w):c13fbe89=02(); Paged(w):c13fbe89=02(); Physical(w):043c7e89=02(); RAM(w):043c7e89=02(); RealRAM(w):043c7e89=02(); Normal(w):c13fbe8a=00( ); Paged(w):c13fbe8a=00( ); Physical(w):043c7e8a=00( ); RAM(w):043c7e8a=00( ); RealRAM(w):043c7e8a=00( ); Normal(w):c13fbe8b=00( ); Paged(w):c13fbe8b=00( ); Physical(w):043c7e8b=00( ); RAM(w):043c7e8b=00( ); RealRAM(w):043c7e8b=00( )
Registers:
EAX: 00000000 EBX: c15200e8 ECX: 00000000 EDX: c1029654
ESP: c13fbe98 EBP: c13fbf70 ESI: c13fbed4 EDI: c159f068
CS: 0028 DS: 0000 ES: 0030 FS: 018f GS: 0000 SS: 0030 TR: 0018 LDTR: 00d8
EIP: c00013bb EFLAGS: 00000016
CR0: 80000011 CR2: bff8d000 CR3: 004bf000 CR4: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 0000c005c0e001f7 IDTR: 0000800a900002ff
CS descriptor: 00CF9B000000FFFF
SS descriptor: 00CF93000000FFFF
DS descriptor: 00CF13000000FFFF
ES descriptor: 00CF93000000FFFF
FS descriptor: 8100F38022F40033
GS descriptor: 00CF13000000FFFF
TR descriptor: C0008B00AEBC2069
LDTR descriptor: 8000820990001FFF
FLAGSINFO: 0000000000ipfavr0n00oditsz0A0P1c
BIU T1 I RealRAM(p):001102b0=60(`); RAM(p):001102b0=60(`); Physical(p):001102b0=60(`); Paged(p):c00012b0=60(`); Normal(p):c00012b0=60(`); RealRAM(p):001102b1=be(¾); RAM(p):001102b1=be(¾); Physical(p):001102b1=be(¾); Paged(p):c00012b1=be(¾); Normal(p):c00012b1=be(¾); RealRAM(p):001102b2=34(4); RAM(p):001102b2=34(4); Physical(p):001102b2=34(4); Paged(p):c00012b2=34(4); Normal(p):c00012b2=34(4); RealRAM(p):001102b3=00( ); RAM(p):001102b3=00( ); Physical(p):001102b3=00( ); Paged(p):c00012b3=00( ); Normal(p):c00012b3=00( ); RealRAM(p):001102b4=00( ); RAM(p):001102b4=00( ); Physical(p):001102b4=00( ); Paged(p):c00012b4=00( ); Normal(p):c00012b4=00( ); RealRAM(p):001102b5=00( ); RAM(p):001102b5=00( ); Physical(p):001102b5=00( ); Paged(p):c00012b5=00( ); Normal(p):c00012b5=00( ); RealRAM(p):001102b6=eb(ë); RAM(p):001102b6=eb(ë); Physical(p):001102b6=eb(ë); Paged(p):c00012b6=eb(ë); Normal(p):c00012b6=eb(ë); RealRAM(p):001102b7=08(); RAM(p):001102b7=08(); Physical(p):001102b7=08(); Paged(p):c00012b7=08(); Normal(p):c00012b7=08(); RealRAM(p):001102b8=60(`); RAM(p):001102b8=60(`); Physical(p):001102b8=60(`); Paged(p):c00012b8=60(`); Normal(p):c00012b8=60(`); RealRAM(p):001102b9=be(¾); RAM(p):001102b9=be(¾); Physical(p):001102b9=be(¾); Paged(p):c00012b9=be(¾); Normal(p):c00012b9=be(¾); RealRAM(p):001102ba=38(8); RAM(p):001102ba=38(8); Physical(p):001102ba=38(8); Paged(p):c00012ba=38(8); Normal(p):c00012ba=38(8); RealRAM(p):001102bb=00( ); RAM(p):001102bb=00( ); Physical(p):001102bb=00( ); Paged(p):c00012bb=00( ); Normal(p):c00012bb=00( ); RealRAM(p):001102bc=00( ); RAM(p):001102bc=00( ); Physical(p):001102bc=00( ); Paged(p):c00012bc=00( ); Normal(p):c00012bc=00( ); RealRAM(p):001102bd=00( ); RAM(p):001102bd=00( ); Physical(p):001102bd=00( ); Paged(p):c00012bd=00( ); Normal(p):c00012bd=00( ); RealRAM(p):001102be=8b(‹); RAM(p):001102be=8b(‹); Physical(p):001102be=8b(‹); Paged(p):c00012be=8b(‹); Normal(p):c00012be=8b(‹)
BIU T1 - 0028:c00012b0 60 pushad Paged(w):c13fbe84=00( ); Physical(w):043c7e84=00( ); RAM(w):043c7e84=00( ); RealRAM(w):043c7e84=00( ); Paged(w):c13fbe85=00( ); Physical(w):043c7e85=00( ); RAM(w):043c7e85=00( ); RealRAM(w):043c7e85=00( ); Paged(w):c13fbe86=00( ); Physical(w):043c7e86=00( ); RAM(w):043c7e86=00( ); RealRAM(w):043c7e86=00( ); Paged(w):c13fbe87=00( ); Physical(w):043c7e87=00( ); RAM(w):043c7e87=00( ); RealRAM(w):043c7e87=00( ); Paged(w):c13fbe80=00( ); Physical(w):043c7e80=00( ); RAM(w):043c7e80=00( ); RealRAM(w):043c7e80=00( ); Paged(w):c13fbe81=00( ); Physical(w):043c7e81=00( ); RAM(w):043c7e81=00( ); RealRAM(w):043c7e81=00( ); Paged(w):c13fbe82=00( ); Physical(w):043c7e82=00( ); RAM(w):043c7e82=00( ); RealRAM(w):043c7e82=00( ); Paged(w):c13fbe83=00( ); Physical(w):043c7e83=00( ); RAM(w):043c7e83=00( ); RealRAM(w):043c7e83=00( ); Paged(w):c13fbe7c=54(T); Physical(w):043c7e7c=54(T); RAM(w):043c7e7c=54(T); RealRAM(w):043c7e7c=54(T); Paged(w):c13fbe7d=96(–); Physical(w):043c7e7d=96(–); RAM(w):043c7e7d=96(–); RealRAM(w):043c7e7d=96(–); Paged(w):c13fbe7e=02(); Physical(w):043c7e7e=02(); RAM(w):043c7e7e=02(); RealRAM(w):043c7e7e=02(); Paged(w):c13fbe7f=c1(Á); Physical(w):043c7e7f=c1(Á); RAM(w):043c7e7f=c1(Á); RealRAM(w):043c7e7f=c1(Á); Paged(w):c13fbe78=e8(è); Physical(w):043c7e78=e8(è); RAM(w):043c7e78=e8(è); RealRAM(w):043c7e78=e8(è); Paged(w):c13fbe79=00( ); Physical(w):043c7e79=00( ); RAM(w):043c7e79=00( ); RealRAM(w):043c7e79=00( ); Paged(w):c13fbe7a=52(R); Physical(w):043c7e7a=52(R); RAM(w):043c7e7a=52(R); RealRAM(w):043c7e7a=52(R); Paged(w):c13fbe7b=c1(Á); Physical(w):043c7e7b=c1(Á); RAM(w):043c7e7b=c1(Á); RealRAM(w):043c7e7b=c1(Á); Paged(w):c13fbe74=88(ˆ); Physical(w):043c7e74=88(ˆ); RAM(w):043c7e74=88(ˆ); RealRAM(w):043c7e74=88(ˆ); Paged(w):c13fbe75=be(¾); Physical(w):043c7e75=be(¾); RAM(w):043c7e75=be(¾); RealRAM(w):043c7e75=be(¾); Paged(w):c13fbe76=3f(?); Physical(w):043c7e76=3f(?); RAM(w):043c7e76=3f(?); RealRAM(w):043c7e76=3f(?); Paged(w):c13fbe77=c1(Á); Physical(w):043c7e77=c1(Á); RAM(w):043c7e77=c1(Á); RealRAM(w):043c7e77=c1(Á); Paged(w):c13fbe70=70(p); Physical(w):043c7e70=70(p); RAM(w):043c7e70=70(p); RealRAM(w):043c7e70=70(p); Paged(w):c13fbe71=bf(¿); Physical(w):043c7e71=bf(¿); RAM(w):043c7e71=bf(¿); RealRAM(w):043c7e71=bf(¿); Paged(w):c13fbe72=3f(?); Physical(w):043c7e72=3f(?); RAM(w):043c7e72=3f(?); RealRAM(w):043c7e72=3f(?); Paged(w):c13fbe73=c1(Á); Physical(w):043c7e73=c1(Á); RAM(w):043c7e73=c1(Á); RealRAM(w):043c7e73=c1(Á); Paged(w):c13fbe6c=d4(Ô); Physical(w):043c7e6c=d4(Ô); RAM(w):043c7e6c=d4(Ô); RealRAM(w):043c7e6c=d4(Ô); Paged(w):c13fbe6d=be(¾); Physical(w):043c7e6d=be(¾); RAM(w):043c7e6d=be(¾); RealRAM(w):043c7e6d=be(¾); Paged(w):c13fbe6e=3f(?); Physical(w):043c7e6e=3f(?); RAM(w):043c7e6e=3f(?); RealRAM(w):043c7e6e=3f(?); Paged(w):c13fbe6f=c1(Á); Physical(w):043c7e6f=c1(Á); RAM(w):043c7e6f=c1(Á); RealRAM(w):043c7e6f=c1(Á); Paged(w):c13fbe68=68(h); Physical(w):043c7e68=68(h); RAM(w):043c7e68=68(h); RealRAM(w):043c7e68=68(h); Paged(w):c13fbe69=f0(ð); Physical(w):043c7e69=f0(ð); RAM(w):043c7e69=f0(ð); RealRAM(w):043c7e69=f0(ð); Paged(w):c13fbe6a=59(Y); Physical(w):043c7e6a=59(Y); RAM(w):043c7e6a=59(Y); RealRAM(w):043c7e6a=59(Y); Paged(w):c13fbe6b=c1(Á); Physical(w):043c7e6b=c1(Á); RAM(w):043c7e6b=c1(Á); RealRAM(w):043c7e6b=c1(Á)
Registers:
EAX: 00000000 EBX: c15200e8 ECX: 00000000 EDX: c1029654
ESP: c13fbe88 EBP: c13fbf70 ESI: c13fbed4 EDI: c159f068
CS: 0028 DS: 0000 ES: 0030 FS: 018f GS: 0000 SS: 0030 TR: 0018 LDTR: 00d8
EIP: c00012b0 EFLAGS: 00000016
CR0: 80000011 CR2: bff8d000 CR3: 004bf000 CR4: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 0000c005c0e001f7 IDTR: 0000800a900002ff
CS descriptor: 00CF9B000000FFFF
SS descriptor: 00CF93000000FFFF
DS descriptor: 00CF13000000FFFF
ES descriptor: 00CF93000000FFFF
FS descriptor: 8100F38022F40033
GS descriptor: 00CF13000000FFFF
TR descriptor: C0008B00AEBC2069
LDTR descriptor: 8000820990001FFF
FLAGSINFO: 0000000000ipfavr0n00oditsz0A0P1c
BIU T1 I RealRAM(p):001102bf=f6(ö); RAM(p):001102bf=f6(ö); Physical(p):001102bf=f6(ö); Paged(p):c00012bf=f6(ö); Normal(p):c00012bf=f6(ö)
BIU T1 - 0028:c00012b1 BE 34 00 00 00 mov esi,00000034
Registers:
EAX: 00000000 EBX: c15200e8 ECX: 00000000 EDX: c1029654
ESP: c13fbe68 EBP: c13fbf70 ESI: c13fbed4 EDI: c159f068
CS: 0028 DS: 0000 ES: 0030 FS: 018f GS: 0000 SS: 0030 TR: 0018 LDTR: 00d8
EIP: c00012b1 EFLAGS: 00000016
CR0: 80000011 CR2: bff8d000 CR3: 004bf000 CR4: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 0000c005c0e001f7 IDTR: 0000800a900002ff
CS descriptor: 00CF9B000000FFFF
SS descriptor: 00CF93000000FFFF
DS descriptor: 00CF13000000FFFF
ES descriptor: 00CF93000000FFFF
FS descriptor: 8100F38022F40033
GS descriptor: 00CF13000000FFFF
TR descriptor: C0008B00AEBC2069
LDTR descriptor: 8000820990001FFF
FLAGSINFO: 0000000000ipfavr0n00oditsz0A0P1c
BIU T1 I RealRAM(p):001102c0=fc(ü); RAM(p):001102c0=fc(ü); Physical(p):001102c0=fc(ü); Paged(p):c00012c0=fc(ü); Normal(p):c00012c0=fc(ü); RealRAM(p):001102c1=66(f); RAM(p):001102c1=66(f); Physical(p):001102c1=66(f); Paged(p):c00012c1=66(f); Normal(p):c00012c1=66(f); RealRAM(p):001102c2=bf(¿); RAM(p):001102c2=bf(¿); Physical(p):001102c2=bf(¿); Paged(p):c00012c2=bf(¿); Normal(p):c00012c2=bf(¿); RealRAM(p):001102c3=30(0); RAM(p):001102c3=30(0); Physical(p):001102c3=30(0); Paged(p):c00012c3=30(0); Normal(p):c00012c3=30(0); RealRAM(p):001102c4=00( ); RAM(p):001102c4=00( ); Physical(p):001102c4=00( ); Paged(p):c00012c4=00( ); Normal(p):c00012c4=00( )
Show last 754 lines
BIU T1 E	0028:c00012b6 EB 08 jmp c00012c0
Registers:
EAX: 00000000 EBX: c15200e8 ECX: 00000000 EDX: c1029654
ESP: c13fbe68 EBP: c13fbf70 ESI: 00000034 EDI: c159f068
CS: 0028 DS: 0000 ES: 0030 FS: 018f GS: 0000 SS: 0030 TR: 0018 LDTR: 00d8
EIP: c00012b6 EFLAGS: 00000016
CR0: 80000011 CR2: bff8d000 CR3: 004bf000 CR4: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 0000c005c0e001f7 IDTR: 0000800a900002ff
CS descriptor: 00CF9B000000FFFF
SS descriptor: 00CF93000000FFFF
DS descriptor: 00CF13000000FFFF
ES descriptor: 00CF93000000FFFF
FS descriptor: 8100F38022F40033
GS descriptor: 00CF13000000FFFF
TR descriptor: C0008B00AEBC2069
LDTR descriptor: 8000820990001FFF
FLAGSINFO: 0000000000ipfavr0n00oditsz0A0P1c
BIU T1 I RealRAM(p):001102c0=fc(ü); RAM(p):001102c0=fc(ü); Physical(p):001102c0=fc(ü); Paged(p):c00012c0=fc(ü); Normal(p):c00012c0=fc(ü); RealRAM(p):001102c1=66(f); RAM(p):001102c1=66(f); Physical(p):001102c1=66(f); Paged(p):c00012c1=66(f); Normal(p):c00012c1=66(f); RealRAM(p):001102c2=bf(¿); RAM(p):001102c2=bf(¿); Physical(p):001102c2=bf(¿); Paged(p):c00012c2=bf(¿); Normal(p):c00012c2=bf(¿); RealRAM(p):001102c3=30(0); RAM(p):001102c3=30(0); Physical(p):001102c3=30(0); Paged(p):c00012c3=30(0); Normal(p):c00012c3=30(0); RealRAM(p):001102c4=00( ); RAM(p):001102c4=00( ); Physical(p):001102c4=00( ); Paged(p):c00012c4=00( ); Normal(p):c00012c4=00( ); RealRAM(p):001102c5=8b(‹); RAM(p):001102c5=8b(‹); Physical(p):001102c5=8b(‹); Paged(p):c00012c5=8b(‹); Normal(p):c00012c5=8b(‹); RealRAM(p):001102c6=ec(ì); RAM(p):001102c6=ec(ì); Physical(p):001102c6=ec(ì); Paged(p):c00012c6=ec(ì); Normal(p):c00012c6=ec(ì); RealRAM(p):001102c7=f6(ö); RAM(p):001102c7=f6(ö); Physical(p):001102c7=f6(ö); Paged(p):c00012c7=f6(ö); Normal(p):c00012c7=f6(ö); RealRAM(p):001102c8=45(E); RAM(p):001102c8=45(E); Physical(p):001102c8=45(E); Paged(p):c00012c8=45(E); Normal(p):c00012c8=45(E); RealRAM(p):001102c9=2e(.); RAM(p):001102c9=2e(.); Physical(p):001102c9=2e(.); Paged(p):c00012c9=2e(.); Normal(p):c00012c9=2e(.); RealRAM(p):001102ca=02(); RAM(p):001102ca=02(); Physical(p):001102ca=02(); Paged(p):c00012ca=02(); Normal(p):c00012ca=02(); RealRAM(p):001102cb=0f(); RAM(p):001102cb=0f(); Physical(p):001102cb=0f(); Paged(p):c00012cb=0f(); Normal(p):c00012cb=0f(); RealRAM(p):001102cc=84(„); RAM(p):001102cc=84(„); Physical(p):001102cc=84(„); Paged(p):c00012cc=84(„); Normal(p):c00012cc=84(„); RealRAM(p):001102cd=9f(Ÿ); RAM(p):001102cd=9f(Ÿ); Physical(p):001102cd=9f(Ÿ); Paged(p):c00012cd=9f(Ÿ); Normal(p):c00012cd=9f(Ÿ); RealRAM(p):001102ce=00( ); RAM(p):001102ce=00( ); Physical(p):001102ce=00( ); Paged(p):c00012ce=00( ); Normal(p):c00012ce=00( )
BIU T1 - 0028:c00012c0 FC cld
Registers:
EAX: 00000000 EBX: c15200e8 ECX: 00000000 EDX: c1029654
ESP: c13fbe68 EBP: c13fbf70 ESI: 00000034 EDI: c159f068
CS: 0028 DS: 0000 ES: 0030 FS: 018f GS: 0000 SS: 0030 TR: 0018 LDTR: 00d8
EIP: c00012c0 EFLAGS: 00000016
CR0: 80000011 CR2: bff8d000 CR3: 004bf000 CR4: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 0000c005c0e001f7 IDTR: 0000800a900002ff
CS descriptor: 00CF9B000000FFFF
SS descriptor: 00CF93000000FFFF
DS descriptor: 00CF13000000FFFF
ES descriptor: 00CF93000000FFFF
FS descriptor: 8100F38022F40033
GS descriptor: 00CF13000000FFFF
TR descriptor: C0008B00AEBC2069
LDTR descriptor: 8000820990001FFF
FLAGSINFO: 0000000000ipfavr0n00oditsz0A0P1c
BIU T1 I RealRAM(p):001102cf=00( ); RAM(p):001102cf=00( ); Physical(p):001102cf=00( ); Paged(p):c00012cf=00( ); Normal(p):c00012cf=00( )
BIU T1 - 0028:c00012c1 66 BF 30 00 mov di,0030
Registers:
EAX: 00000000 EBX: c15200e8 ECX: 00000000 EDX: c1029654
ESP: c13fbe68 EBP: c13fbf70 ESI: 00000034 EDI: c159f068
CS: 0028 DS: 0000 ES: 0030 FS: 018f GS: 0000 SS: 0030 TR: 0018 LDTR: 00d8
EIP: c00012c1 EFLAGS: 00000016
CR0: 80000011 CR2: bff8d000 CR3: 004bf000 CR4: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 0000c005c0e001f7 IDTR: 0000800a900002ff
CS descriptor: 00CF9B000000FFFF
SS descriptor: 00CF93000000FFFF
DS descriptor: 00CF13000000FFFF
ES descriptor: 00CF93000000FFFF
FS descriptor: 8100F38022F40033
GS descriptor: 00CF13000000FFFF
TR descriptor: C0008B00AEBC2069
LDTR descriptor: 8000820990001FFF
FLAGSINFO: 0000000000ipfavr0n00oditsz0A0P1c
BIU T1 I RealRAM(p):001102d0=00( ); RAM(p):001102d0=00( ); Physical(p):001102d0=00( ); Paged(p):c00012d0=00( ); Normal(p):c00012d0=00( ); RealRAM(p):001102d1=8e(Ž); RAM(p):001102d1=8e(Ž); Physical(p):001102d1=8e(Ž); Paged(p):c00012d1=8e(Ž); Normal(p):c00012d1=8e(Ž); RealRAM(p):001102d2=df(ß); RAM(p):001102d2=df(ß); Physical(p):001102d2=df(ß); Paged(p):c00012d2=df(ß); Normal(p):c00012d2=df(ß); RealRAM(p):001102d3=8e(Ž); RAM(p):001102d3=8e(Ž); Physical(p):001102d3=8e(Ž); Paged(p):c00012d3=8e(Ž); Normal(p):c00012d3=8e(Ž)
BIU T1 - 0028:c00012c5 8B EC mov ebp,esp
Registers:
EAX: 00000000 EBX: c15200e8 ECX: 00000000 EDX: c1029654
ESP: c13fbe68 EBP: c13fbf70 ESI: 00000034 EDI: c1590030
CS: 0028 DS: 0000 ES: 0030 FS: 018f GS: 0000 SS: 0030 TR: 0018 LDTR: 00d8
EIP: c00012c5 EFLAGS: 00000016
CR0: 80000011 CR2: bff8d000 CR3: 004bf000 CR4: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 0000c005c0e001f7 IDTR: 0000800a900002ff
CS descriptor: 00CF9B000000FFFF
SS descriptor: 00CF93000000FFFF
DS descriptor: 00CF13000000FFFF
ES descriptor: 00CF93000000FFFF
FS descriptor: 8100F38022F40033
GS descriptor: 00CF13000000FFFF
TR descriptor: C0008B00AEBC2069
LDTR descriptor: 8000820990001FFF
FLAGSINFO: 0000000000ipfavr0n00oditsz0A0P1c
BIU T1 I RealRAM(p):001102d4=c7(Ç); RAM(p):001102d4=c7(Ç); Physical(p):001102d4=c7(Ç); Paged(p):c00012d4=c7(Ç); Normal(p):c00012d4=c7(Ç); RealRAM(p):001102d5=8b(‹); RAM(p):001102d5=8b(‹); Physical(p):001102d5=8b(‹); Paged(p):c00012d5=8b(‹); Normal(p):c00012d5=8b(‹)
BIU T1 - 0028:c00012c7 F6 45 2E 02 test byte ss:[ebp+2e],02 RealRAM(r):043c7e96=00( ); RAM(r):043c7e96=00( ); Physical(r):043c7e96=00( ); Paged(r):c13fbe96=00( )
Registers:
EAX: 00000000 EBX: c15200e8 ECX: 00000000 EDX: c1029654
ESP: c13fbe68 EBP: c13fbe68 ESI: 00000034 EDI: c1590030
CS: 0028 DS: 0000 ES: 0030 FS: 018f GS: 0000 SS: 0030 TR: 0018 LDTR: 00d8
EIP: c00012c7 EFLAGS: 00000016
CR0: 80000011 CR2: bff8d000 CR3: 004bf000 CR4: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 0000c005c0e001f7 IDTR: 0000800a900002ff
CS descriptor: 00CF9B000000FFFF
SS descriptor: 00CF93000000FFFF
DS descriptor: 00CF13000000FFFF
ES descriptor: 00CF93000000FFFF
FS descriptor: 8100F38022F40033
GS descriptor: 00CF13000000FFFF
TR descriptor: C0008B00AEBC2069
LDTR descriptor: 8000820990001FFF
FLAGSINFO: 0000000000ipfavr0n00oditsz0A0P1c
BIU T1 I RealRAM(p):001102d6=3d(=); RAM(p):001102d6=3d(=); Physical(p):001102d6=3d(=); Paged(p):c00012d6=3d(=); Normal(p):c00012d6=3d(=); RealRAM(p):001102d7=b8(¸); RAM(p):001102d7=b8(¸); Physical(p):001102d7=b8(¸); Paged(p):c00012d7=b8(¸); Normal(p):c00012d7=b8(¸); RealRAM(p):001102d8=06(); RAM(p):001102d8=06(); Physical(p):001102d8=06(); Paged(p):c00012d8=06(); Normal(p):c00012d8=06(); RealRAM(p):001102d9=01(); RAM(p):001102d9=01(); Physical(p):001102d9=01(); Paged(p):c00012d9=01(); Normal(p):c00012d9=01()
BIU T1 E 0028:c00012cb 0F 84 9F 00 00 00 jz c0001370
Registers:
EAX: 00000000 EBX: c15200e8 ECX: 00000000 EDX: c1029654
ESP: c13fbe68 EBP: c13fbe68 ESI: 00000034 EDI: c1590030
CS: 0028 DS: 0000 ES: 0030 FS: 018f GS: 0000 SS: 0030 TR: 0018 LDTR: 00d8
EIP: c00012cb EFLAGS: 00000046
CR0: 80000011 CR2: bff8d000 CR3: 004bf000 CR4: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 0000c005c0e001f7 IDTR: 0000800a900002ff
CS descriptor: 00CF9B000000FFFF
SS descriptor: 00CF93000000FFFF
DS descriptor: 00CF13000000FFFF
ES descriptor: 00CF93000000FFFF
FS descriptor: 8100F38022F40033
GS descriptor: 00CF13000000FFFF
TR descriptor: C0008B00AEBC2069
LDTR descriptor: 8000820990001FFF
FLAGSINFO: 0000000000ipfavr0n00oditsZ0a0P1c
BIU T1 I RealRAM(p):00110370=2e(.); RAM(p):00110370=2e(.); Physical(p):00110370=2e(.); Paged(p):c0001370=2e(.); Normal(p):c0001370=2e(.); RealRAM(p):00110371=8b(‹); RAM(p):00110371=8b(‹); Physical(p):00110371=8b(‹); Paged(p):c0001371=8b(‹); Normal(p):c0001371=8b(‹); RealRAM(p):00110372=1d(); RAM(p):00110372=1d(); Physical(p):00110372=1d(); Paged(p):c0001372=1d(); Normal(p):c0001372=1d(); RealRAM(p):00110373=2c(,); RAM(p):00110373=2c(,); Physical(p):00110373=2c(,); Paged(p):c0001373=2c(,); Normal(p):c0001373=2c(,); RealRAM(p):00110374=07(); RAM(p):00110374=07(); Physical(p):00110374=07(); Paged(p):c0001374=07(); Normal(p):c0001374=07(); RealRAM(p):00110375=01(); RAM(p):00110375=01(); Physical(p):00110375=01(); Paged(p):c0001375=01(); Normal(p):c0001375=01(); RealRAM(p):00110376=c0(À); RAM(p):00110376=c0(À); Physical(p):00110376=c0(À); Paged(p):c0001376=c0(À); Normal(p):c0001376=c0(À); RealRAM(p):00110377=2e(.); RAM(p):00110377=2e(.); Physical(p):00110377=2e(.); Paged(p):c0001377=2e(.); Normal(p):c0001377=2e(.); RealRAM(p):00110378=3b(;); RAM(p):00110378=3b(;); Physical(p):00110378=3b(;); Paged(p):c0001378=3b(;); Normal(p):c0001378=3b(;); RealRAM(p):00110379=6b(k); RAM(p):00110379=6b(k); Physical(p):00110379=6b(k); Paged(p):c0001379=6b(k); Normal(p):c0001379=6b(k); RealRAM(p):0011037a=08(); RAM(p):0011037a=08(); Physical(p):0011037a=08(); Paged(p):c000137a=08(); Normal(p):c000137a=08(); RealRAM(p):0011037b=0f(); RAM(p):0011037b=0f(); Physical(p):0011037b=0f(); Paged(p):c000137b=0f(); Normal(p):c000137b=0f(); RealRAM(p):0011037c=85(…); RAM(p):0011037c=85(…); Physical(p):0011037c=85(…); Paged(p):c000137c=85(…); Normal(p):c000137c=85(…); RealRAM(p):0011037d=8f(); RAM(p):0011037d=8f(); Physical(p):0011037d=8f(); Paged(p):c000137d=8f(); Normal(p):c000137d=8f(); RealRAM(p):0011037e=00( ); RAM(p):0011037e=00( ); Physical(p):0011037e=00( ); Paged(p):c000137e=00( ); Normal(p):c000137e=00( )
BIU T1 - 0028:c0001370 2E 8B 1D 2C 07 01 C0 mov ebx,dword cs:[c001072c] RealRAM(r):0038d72c=e8(è); RAM(r):0038d72c=e8(è); Physical(r):0038d72c=e8(è); Paged(r):c001072c=e8(è); RealRAM(r):0038d72d=00( ); RAM(r):0038d72d=00( ); Physical(r):0038d72d=00( ); Paged(r):c001072d=00( ); RealRAM(r):0038d72e=52(R); RAM(r):0038d72e=52(R); Physical(r):0038d72e=52(R); Paged(r):c001072e=52(R); RealRAM(r):0038d72f=c1(Á); RAM(r):0038d72f=c1(Á); Physical(r):0038d72f=c1(Á); Paged(r):c001072f=c1(Á)
Registers:
EAX: 00000000 EBX: c15200e8 ECX: 00000000 EDX: c1029654
ESP: c13fbe68 EBP: c13fbe68 ESI: 00000034 EDI: c1590030
CS: 0028 DS: 0000 ES: 0030 FS: 018f GS: 0000 SS: 0030 TR: 0018 LDTR: 00d8
EIP: c0001370 EFLAGS: 00000046
CR0: 80000011 CR2: bff8d000 CR3: 004bf000 CR4: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 0000c005c0e001f7 IDTR: 0000800a900002ff
CS descriptor: 00CF9B000000FFFF
SS descriptor: 00CF93000000FFFF
DS descriptor: 00CF13000000FFFF
ES descriptor: 00CF93000000FFFF
FS descriptor: 8100F38022F40033
GS descriptor: 00CF13000000FFFF
TR descriptor: C0008B00AEBC2069
LDTR descriptor: 8000820990001FFF
FLAGSINFO: 0000000000ipfavr0n00oditsZ0a0P1c
BIU T1 I RealRAM(p):0011037f=00( ); RAM(p):0011037f=00( ); Physical(p):0011037f=00( ); Paged(p):c000137f=00( ); Normal(p):c000137f=00( ); RealRAM(p):00110380=00( ); RAM(p):00110380=00( ); Physical(p):00110380=00( ); Paged(p):c0001380=00( ); Normal(p):c0001380=00( ); RealRAM(p):00110381=8c(Œ); RAM(p):00110381=8c(Œ); Physical(p):00110381=8c(Œ); Paged(p):c0001381=8c(Œ); Normal(p):c0001381=8c(Œ); RealRAM(p):00110382=5d(]); RAM(p):00110382=5d(]); Physical(p):00110382=5d(]); Paged(p):c0001382=5d(]); Normal(p):c0001382=5d(]); RealRAM(p):00110383=3c(<); RAM(p):00110383=3c(<); Physical(p):00110383=3c(<); Paged(p):c0001383=3c(<); Normal(p):c0001383=3c(<); RealRAM(p):00110384=8c(Œ); RAM(p):00110384=8c(Œ); Physical(p):00110384=8c(Œ); Paged(p):c0001384=8c(Œ); Normal(p):c0001384=8c(Œ); RealRAM(p):00110385=45(E); RAM(p):00110385=45(E); Physical(p):00110385=45(E); Paged(p):c0001385=45(E); Normal(p):c0001385=45(E)
BIU T1 - 0028:c0001377 2E 3B 6B 08 cmp ebp,dword cs:[ebx+08] RealRAM(r):0438a0f0=70(p); RAM(r):0438a0f0=70(p); Physical(r):0438a0f0=70(p); Paged(r):c15200f0=70(p); RealRAM(r):0438a0f1=bf(¿); RAM(r):0438a0f1=bf(¿); Physical(r):0438a0f1=bf(¿); Paged(r):c15200f1=bf(¿); RealRAM(r):0438a0f2=3f(?); RAM(r):0438a0f2=3f(?); Physical(r):0438a0f2=3f(?); Paged(r):c15200f2=3f(?); RealRAM(r):0438a0f3=c1(Á); RAM(r):0438a0f3=c1(Á); Physical(r):0438a0f3=c1(Á); Paged(r):c15200f3=c1(Á)
Registers:
EAX: 00000000 EBX: c15200e8 ECX: 00000000 EDX: c1029654
ESP: c13fbe68 EBP: c13fbe68 ESI: 00000034 EDI: c1590030
CS: 0028 DS: 0000 ES: 0030 FS: 018f GS: 0000 SS: 0030 TR: 0018 LDTR: 00d8
EIP: c0001377 EFLAGS: 00000046
CR0: 80000011 CR2: bff8d000 CR3: 004bf000 CR4: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 0000c005c0e001f7 IDTR: 0000800a900002ff
CS descriptor: 00CF9B000000FFFF
SS descriptor: 00CF93000000FFFF
DS descriptor: 00CF13000000FFFF
ES descriptor: 00CF93000000FFFF
FS descriptor: 8100F38022F40033
GS descriptor: 00CF13000000FFFF
TR descriptor: C0008B00AEBC2069
LDTR descriptor: 8000820990001FFF
FLAGSINFO: 0000000000ipfavr0n00oditsZ0a0P1c
BIU T1 I RealRAM(p):00110386=38(8); RAM(p):00110386=38(8); Physical(p):00110386=38(8); Paged(p):c0001386=38(8); Normal(p):c0001386=38(8); RealRAM(p):00110387=8c(Œ); RAM(p):00110387=8c(Œ); Physical(p):00110387=8c(Œ); Paged(p):c0001387=8c(Œ); Normal(p):c0001387=8c(Œ); RealRAM(p):00110388=65(e); RAM(p):00110388=65(e); Physical(p):00110388=65(e); Paged(p):c0001388=65(e); Normal(p):c0001388=65(e); RealRAM(p):00110389=40(@); RAM(p):00110389=40(@); Physical(p):00110389=40(@); Paged(p):c0001389=40(@); Normal(p):c0001389=40(@)
BIU T1 E 0028:c000137b 0F 85 8F 00 00 00 jnz c0001410
Registers:
EAX: 00000000 EBX: c15200e8 ECX: 00000000 EDX: c1029654
ESP: c13fbe68 EBP: c13fbe68 ESI: 00000034 EDI: c1590030
CS: 0028 DS: 0000 ES: 0030 FS: 018f GS: 0000 SS: 0030 TR: 0018 LDTR: 00d8
EIP: c000137b EFLAGS: 00000083
CR0: 80000011 CR2: bff8d000 CR3: 004bf000 CR4: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 0000c005c0e001f7 IDTR: 0000800a900002ff
CS descriptor: 00CF9B000000FFFF
SS descriptor: 00CF93000000FFFF
DS descriptor: 00CF13000000FFFF
ES descriptor: 00CF93000000FFFF
FS descriptor: 8100F38022F40033
GS descriptor: 00CF13000000FFFF
TR descriptor: C0008B00AEBC2069
LDTR descriptor: 8000820990001FFF
FLAGSINFO: 0000000000ipfavr0n00oditSz0a0p1C
BIU T1 I RealRAM(p):00110410=83(ƒ); RAM(p):00110410=83(ƒ); Physical(p):00110410=83(ƒ); Paged(p):c0001410=83(ƒ); Normal(p):c0001410=83(ƒ); RealRAM(p):00110411=fe(þ); RAM(p):00110411=fe(þ); Physical(p):00110411=fe(þ); Paged(p):c0001411=fe(þ); Normal(p):c0001411=fe(þ); RealRAM(p):00110412=34(4); RAM(p):00110412=34(4); Physical(p):00110412=34(4); Paged(p):c0001412=34(4); Normal(p):c0001412=34(4); RealRAM(p):00110413=76(v); RAM(p):00110413=76(v); Physical(p):00110413=76(v); Paged(p):c0001413=76(v); Normal(p):c0001413=76(v); RealRAM(p):00110414=33(3); RAM(p):00110414=33(3); Physical(p):00110414=33(3); Paged(p):c0001414=33(3); Normal(p):c0001414=33(3); RealRAM(p):00110415=1e(); RAM(p):00110415=1e(); Physical(p):00110415=1e(); Paged(p):c0001415=1e(); Normal(p):c0001415=1e(); RealRAM(p):00110416=8e(Ž); RAM(p):00110416=8e(Ž); Physical(p):00110416=8e(Ž); Paged(p):c0001416=8e(Ž); Normal(p):c0001416=8e(Ž); RealRAM(p):00110417=df(ß); RAM(p):00110417=df(ß); Physical(p):00110417=df(ß); Paged(p):c0001417=df(ß); Normal(p):c0001417=df(ß); RealRAM(p):00110418=ff(ÿ); RAM(p):00110418=ff(ÿ); Physical(p):00110418=ff(ÿ); Paged(p):c0001418=ff(ÿ); Normal(p):c0001418=ff(ÿ); RealRAM(p):00110419=05(); RAM(p):00110419=05(); Physical(p):00110419=05(); Paged(p):c0001419=05(); Normal(p):c0001419=05(); RealRAM(p):0011041a=18(); RAM(p):0011041a=18(); Physical(p):0011041a=18(); Paged(p):c000141a=18(); Normal(p):c000141a=18(); RealRAM(p):0011041b=f4(ô); RAM(p):0011041b=f4(ô); Physical(p):0011041b=f4(ô); Paged(p):c000141b=f4(ô); Normal(p):c000141b=f4(ô); RealRAM(p):0011041c=00( ); RAM(p):0011041c=00( ); Physical(p):0011041c=00( ); Paged(p):c000141c=00( ); Normal(p):c000141c=00( ); RealRAM(p):0011041d=c0(À); RAM(p):0011041d=c0(À); Physical(p):0011041d=c0(À); Paged(p):c000141d=c0(À); Normal(p):c000141d=c0(À); RealRAM(p):0011041e=06(); RAM(p):0011041e=06(); Physical(p):0011041e=06(); Paged(p):c000141e=06(); Normal(p):c000141e=06()
BIU T1 - 0028:c0001410 83 FE 34 cmp esi,34
Registers:
EAX: 00000000 EBX: c15200e8 ECX: 00000000 EDX: c1029654
ESP: c13fbe68 EBP: c13fbe68 ESI: 00000034 EDI: c1590030
CS: 0028 DS: 0000 ES: 0030 FS: 018f GS: 0000 SS: 0030 TR: 0018 LDTR: 00d8
EIP: c0001410 EFLAGS: 00000083
CR0: 80000011 CR2: bff8d000 CR3: 004bf000 CR4: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 0000c005c0e001f7 IDTR: 0000800a900002ff
CS descriptor: 00CF9B000000FFFF
SS descriptor: 00CF93000000FFFF
DS descriptor: 00CF13000000FFFF
ES descriptor: 00CF93000000FFFF
FS descriptor: 8100F38022F40033
GS descriptor: 00CF13000000FFFF
TR descriptor: C0008B00AEBC2069
LDTR descriptor: 8000820990001FFF
FLAGSINFO: 0000000000ipfavr0n00oditSz0a0p1C
BIU T1 I RealRAM(p):0011041f=8e(Ž); RAM(p):0011041f=8e(Ž); Physical(p):0011041f=8e(Ž); Paged(p):c000141f=8e(Ž); Normal(p):c000141f=8e(Ž); RealRAM(p):00110420=c7(Ç); RAM(p):00110420=c7(Ç); Physical(p):00110420=c7(Ç); Paged(p):c0001420=c7(Ç); Normal(p):c0001420=c7(Ç); RealRAM(p):00110421=0f(); RAM(p):00110421=0f(); Physical(p):00110421=0f(); Paged(p):c0001421=0f(); Normal(p):c0001421=0f()
BIU T1 E 0028:c0001413 76 33 jbe c0001448
Registers:
EAX: 00000000 EBX: c15200e8 ECX: 00000000 EDX: c1029654
ESP: c13fbe68 EBP: c13fbe68 ESI: 00000034 EDI: c1590030
CS: 0028 DS: 0000 ES: 0030 FS: 018f GS: 0000 SS: 0030 TR: 0018 LDTR: 00d8
EIP: c0001413 EFLAGS: 00000046
CR0: 80000011 CR2: bff8d000 CR3: 004bf000 CR4: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 0000c005c0e001f7 IDTR: 0000800a900002ff
CS descriptor: 00CF9B000000FFFF
SS descriptor: 00CF93000000FFFF
DS descriptor: 00CF13000000FFFF
ES descriptor: 00CF93000000FFFF
FS descriptor: 8100F38022F40033
GS descriptor: 00CF13000000FFFF
TR descriptor: C0008B00AEBC2069
LDTR descriptor: 8000820990001FFF
FLAGSINFO: 0000000000ipfavr0n00oditsZ0a0P1c
BIU T1 I RealRAM(p):00110448=83(ƒ); RAM(p):00110448=83(ƒ); Physical(p):00110448=83(ƒ); Paged(p):c0001448=83(ƒ); Normal(p):c0001448=83(ƒ); RealRAM(p):00110449=fe(þ); RAM(p):00110449=fe(þ); Physical(p):00110449=fe(þ); Paged(p):c0001449=fe(þ); Normal(p):c0001449=fe(þ); RealRAM(p):0011044a=2c(,); RAM(p):0011044a=2c(,); Physical(p):0011044a=2c(,); Paged(p):c000144a=2c(,); Normal(p):c000144a=2c(,); RealRAM(p):0011044b=72(r); RAM(p):0011044b=72(r); Physical(p):0011044b=72(r); Paged(p):c000144b=72(r); Normal(p):c000144b=72(r); RealRAM(p):0011044c=c8(È); RAM(p):0011044c=c8(È); Physical(p):0011044c=c8(È); Paged(p):c000144c=c8(È); Normal(p):c000144c=c8(È); RealRAM(p):0011044d=81(); RAM(p):0011044d=81(); Physical(p):0011044d=81(); Paged(p):c000144d=81(); Normal(p):c000144d=81(); RealRAM(p):0011044e=7d(}); RAM(p):0011044e=7d(}); Physical(p):0011044e=7d(}); Paged(p):c000144e=7d(}); Normal(p):c000144e=7d(}); RealRAM(p):0011044f=24($); RAM(p):0011044f=24($); Physical(p):0011044f=24($); Paged(p):c000144f=24($); Normal(p):c000144f=24($); RealRAM(p):00110450=b7(·); RAM(p):00110450=b7(·); Physical(p):00110450=b7(·); Paged(p):c0001450=b7(·); Normal(p):c0001450=b7(·); RealRAM(p):00110451=13(); RAM(p):00110451=13(); Physical(p):00110451=13(); Paged(p):c0001451=13(); Normal(p):c0001451=13(); RealRAM(p):00110452=00( ); RAM(p):00110452=00( ); Physical(p):00110452=00( ); Paged(p):c0001452=00( ); Normal(p):c0001452=00( ); RealRAM(p):00110453=c0(À); RAM(p):00110453=c0(À); Physical(p):00110453=c0(À); Paged(p):c0001453=c0(À); Normal(p):c0001453=c0(À); RealRAM(p):00110454=72(r); RAM(p):00110454=72(r); Physical(p):00110454=72(r); Paged(p):c0001454=72(r); Normal(p):c0001454=72(r); RealRAM(p):00110455=bf(¿); RAM(p):00110455=bf(¿); Physical(p):00110455=bf(¿); Paged(p):c0001455=bf(¿); Normal(p):c0001455=bf(¿); RealRAM(p):00110456=81(); RAM(p):00110456=81(); Physical(p):00110456=81(); Paged(p):c0001456=81(); Normal(p):c0001456=81()
BIU T1 - 0028:c0001448 83 FE 2C cmp esi,2c
Registers:
EAX: 00000000 EBX: c15200e8 ECX: 00000000 EDX: c1029654
ESP: c13fbe68 EBP: c13fbe68 ESI: 00000034 EDI: c1590030
CS: 0028 DS: 0000 ES: 0030 FS: 018f GS: 0000 SS: 0030 TR: 0018 LDTR: 00d8
EIP: c0001448 EFLAGS: 00000046
CR0: 80000011 CR2: bff8d000 CR3: 004bf000 CR4: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 0000c005c0e001f7 IDTR: 0000800a900002ff
CS descriptor: 00CF9B000000FFFF
SS descriptor: 00CF93000000FFFF
DS descriptor: 00CF13000000FFFF
ES descriptor: 00CF93000000FFFF
FS descriptor: 8100F38022F40033
GS descriptor: 00CF13000000FFFF
TR descriptor: C0008B00AEBC2069
LDTR descriptor: 8000820990001FFF
FLAGSINFO: 0000000000ipfavr0n00oditsZ0a0P1c
BIU T1 I RealRAM(p):00110457=7d(}); RAM(p):00110457=7d(}); Physical(p):00110457=7d(}); Paged(p):c0001457=7d(}); Normal(p):c0001457=7d(}); RealRAM(p):00110458=24($); RAM(p):00110458=24($); Physical(p):00110458=24($); Paged(p):c0001458=24($); Normal(p):c0001458=24($); RealRAM(p):00110459=d2(Ò); RAM(p):00110459=d2(Ò); Physical(p):00110459=d2(Ò); Paged(p):c0001459=d2(Ò); Normal(p):c0001459=d2(Ò)
BIU T1 - 0028:c000144b 72 C8 jc c0001415
Registers:
EAX: 00000000 EBX: c15200e8 ECX: 00000000 EDX: c1029654
ESP: c13fbe68 EBP: c13fbe68 ESI: 00000034 EDI: c1590030
CS: 0028 DS: 0000 ES: 0030 FS: 018f GS: 0000 SS: 0030 TR: 0018 LDTR: 00d8
EIP: c000144b EFLAGS: 00000012
CR0: 80000011 CR2: bff8d000 CR3: 004bf000 CR4: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 0000c005c0e001f7 IDTR: 0000800a900002ff
CS descriptor: 00CF9B000000FFFF
SS descriptor: 00CF93000000FFFF
DS descriptor: 00CF13000000FFFF
ES descriptor: 00CF93000000FFFF
FS descriptor: 8100F38022F40033
GS descriptor: 00CF13000000FFFF
TR descriptor: C0008B00AEBC2069
LDTR descriptor: 8000820990001FFF
FLAGSINFO: 0000000000ipfavr0n00oditsz0A0p1c
BIU T1 I RealRAM(p):0011045a=13(); RAM(p):0011045a=13(); Physical(p):0011045a=13(); Paged(p):c000145a=13(); Normal(p):c000145a=13(); RealRAM(p):0011045b=00( ); RAM(p):0011045b=00( ); Physical(p):0011045b=00( ); Paged(p):c000145b=00( ); Normal(p):c000145b=00( )
BIU T1 - 0028:c000144d 81 7D 24 B7 13 00 C0 cmp dword ss:[ebp+24],c00013b7 RealRAM(r):043c7e8c=bb(»); RAM(r):043c7e8c=bb(»); Physical(r):043c7e8c=bb(»); Paged(r):c13fbe8c=bb(»); RealRAM(r):043c7e8d=13(); RAM(r):043c7e8d=13(); Physical(r):043c7e8d=13(); Paged(r):c13fbe8d=13(); RealRAM(r):043c7e8e=00( ); RAM(r):043c7e8e=00( ); Physical(r):043c7e8e=00( ); Paged(r):c13fbe8e=00( ); RealRAM(r):043c7e8f=c0(À); RAM(r):043c7e8f=c0(À); Physical(r):043c7e8f=c0(À); Paged(r):c13fbe8f=c0(À)
Registers:
EAX: 00000000 EBX: c15200e8 ECX: 00000000 EDX: c1029654
ESP: c13fbe68 EBP: c13fbe68 ESI: 00000034 EDI: c1590030
CS: 0028 DS: 0000 ES: 0030 FS: 018f GS: 0000 SS: 0030 TR: 0018 LDTR: 00d8
EIP: c000144d EFLAGS: 00000012
CR0: 80000011 CR2: bff8d000 CR3: 004bf000 CR4: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 0000c005c0e001f7 IDTR: 0000800a900002ff
CS descriptor: 00CF9B000000FFFF
SS descriptor: 00CF93000000FFFF
DS descriptor: 00CF13000000FFFF
ES descriptor: 00CF93000000FFFF
FS descriptor: 8100F38022F40033
GS descriptor: 00CF13000000FFFF
TR descriptor: C0008B00AEBC2069
LDTR descriptor: 8000820990001FFF
FLAGSINFO: 0000000000ipfavr0n00oditsz0A0p1c
BIU T1 I RealRAM(p):0011045c=c0(À); RAM(p):0011045c=c0(À); Physical(p):0011045c=c0(À); Paged(p):c000145c=c0(À); Normal(p):c000145c=c0(À); RealRAM(p):0011045d=73(s); RAM(p):0011045d=73(s); Physical(p):0011045d=73(s); Paged(p):c000145d=73(s); Normal(p):c000145d=73(s); RealRAM(p):0011045e=b6(¶); RAM(p):0011045e=b6(¶); Physical(p):0011045e=b6(¶); Paged(p):c000145e=b6(¶); Normal(p):c000145e=b6(¶); RealRAM(p):0011045f=8b(‹); RAM(p):0011045f=8b(‹); Physical(p):0011045f=8b(‹); Paged(p):c000145f=8b(‹); Normal(p):c000145f=8b(‹); RealRAM(p):00110460=cd(Í); RAM(p):00110460=cd(Í); Physical(p):00110460=cd(Í); Paged(p):c0001460=cd(Í); Normal(p):c0001460=cd(Í); RealRAM(p):00110461=8b(‹); RAM(p):00110461=8b(‹); Physical(p):00110461=8b(‹); Paged(p):c0001461=8b(‹); Normal(p):c0001461=8b(‹); RealRAM(p):00110462=45(E); RAM(p):00110462=45(E); Physical(p):00110462=45(E); Paged(p):c0001462=45(E); Normal(p):c0001462=45(E)
BIU T1 - 0028:c0001454 72 BF jc c0001415
Registers:
EAX: 00000000 EBX: c15200e8 ECX: 00000000 EDX: c1029654
ESP: c13fbe68 EBP: c13fbe68 ESI: 00000034 EDI: c1590030
CS: 0028 DS: 0000 ES: 0030 FS: 018f GS: 0000 SS: 0030 TR: 0018 LDTR: 00d8
EIP: c0001454 EFLAGS: 00000002
CR0: 80000011 CR2: bff8d000 CR3: 004bf000 CR4: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 0000c005c0e001f7 IDTR: 0000800a900002ff
CS descriptor: 00CF9B000000FFFF
SS descriptor: 00CF93000000FFFF
DS descriptor: 00CF13000000FFFF
ES descriptor: 00CF93000000FFFF
FS descriptor: 8100F38022F40033
GS descriptor: 00CF13000000FFFF
TR descriptor: C0008B00AEBC2069
LDTR descriptor: 8000820990001FFF
FLAGSINFO: 0000000000ipfavr0n00oditsz0a0p1c
BIU T1 I RealRAM(p):00110463=24($); RAM(p):00110463=24($); Physical(p):00110463=24($); Paged(p):c0001463=24($); Normal(p):c0001463=24($); RealRAM(p):00110464=2e(.); RAM(p):00110464=2e(.); Physical(p):00110464=2e(.); Paged(p):c0001464=2e(.); Normal(p):c0001464=2e(.)
BIU T1 - 0028:c0001456 81 7D 24 D2 13 00 C0 cmp dword ss:[ebp+24],c00013d2 RealRAM(r):043c7e8c=bb(»); RAM(r):043c7e8c=bb(»); Physical(r):043c7e8c=bb(»); Paged(r):c13fbe8c=bb(»); RealRAM(r):043c7e8d=13(); RAM(r):043c7e8d=13(); Physical(r):043c7e8d=13(); Paged(r):c13fbe8d=13(); RealRAM(r):043c7e8e=00( ); RAM(r):043c7e8e=00( ); Physical(r):043c7e8e=00( ); Paged(r):c13fbe8e=00( ); RealRAM(r):043c7e8f=c0(À); RAM(r):043c7e8f=c0(À); Physical(r):043c7e8f=c0(À); Paged(r):c13fbe8f=c0(À)
Registers:
EAX: 00000000 EBX: c15200e8 ECX: 00000000 EDX: c1029654
ESP: c13fbe68 EBP: c13fbe68 ESI: 00000034 EDI: c1590030
CS: 0028 DS: 0000 ES: 0030 FS: 018f GS: 0000 SS: 0030 TR: 0018 LDTR: 00d8
EIP: c0001456 EFLAGS: 00000002
CR0: 80000011 CR2: bff8d000 CR3: 004bf000 CR4: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 0000c005c0e001f7 IDTR: 0000800a900002ff
CS descriptor: 00CF9B000000FFFF
SS descriptor: 00CF93000000FFFF
DS descriptor: 00CF13000000FFFF
ES descriptor: 00CF93000000FFFF
FS descriptor: 8100F38022F40033
GS descriptor: 00CF13000000FFFF
TR descriptor: C0008B00AEBC2069
LDTR descriptor: 8000820990001FFF
FLAGSINFO: 0000000000ipfavr0n00oditsz0a0p1c
BIU T1 I RealRAM(p):00110465=8b(‹); RAM(p):00110465=8b(‹); Physical(p):00110465=8b(‹); Paged(p):c0001465=8b(‹); Normal(p):c0001465=8b(‹); RealRAM(p):00110466=6b(k); RAM(p):00110466=6b(k); Physical(p):00110466=6b(k); Paged(p):c0001466=6b(k); Normal(p):c0001466=6b(k); RealRAM(p):00110467=08(); RAM(p):00110467=08(); Physical(p):00110467=08(); Paged(p):c0001467=08(); Normal(p):c0001467=08(); RealRAM(p):00110468=8d(); RAM(p):00110468=8d(); Physical(p):00110468=8d(); Paged(p):c0001468=8d(); Normal(p):c0001468=8d(); RealRAM(p):00110469=55(U); RAM(p):00110469=55(U); Physical(p):00110469=55(U); Paged(p):c0001469=55(U); Normal(p):c0001469=55(U); RealRAM(p):0011046a=3c(<); RAM(p):0011046a=3c(<); Physical(p):0011046a=3c(<); Paged(p):c000146a=3c(<); Normal(p):c000146a=3c(<); RealRAM(p):0011046b=3d(=); RAM(p):0011046b=3d(=); Physical(p):0011046b=3d(=); Paged(p):c000146b=3d(=); Normal(p):c000146b=3d(=)
BIU T1 - 0028:c000145d 73 B6 jnc c0001415
Registers:
EAX: 00000000 EBX: c15200e8 ECX: 00000000 EDX: c1029654
ESP: c13fbe68 EBP: c13fbe68 ESI: 00000034 EDI: c1590030
CS: 0028 DS: 0000 ES: 0030 FS: 018f GS: 0000 SS: 0030 TR: 0018 LDTR: 00d8
EIP: c000145d EFLAGS: 00000083
CR0: 80000011 CR2: bff8d000 CR3: 004bf000 CR4: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 0000c005c0e001f7 IDTR: 0000800a900002ff
CS descriptor: 00CF9B000000FFFF
SS descriptor: 00CF93000000FFFF
DS descriptor: 00CF13000000FFFF
ES descriptor: 00CF93000000FFFF
FS descriptor: 8100F38022F40033
GS descriptor: 00CF13000000FFFF
TR descriptor: C0008B00AEBC2069
LDTR descriptor: 8000820990001FFF
FLAGSINFO: 0000000000ipfavr0n00oditSz0a0p1C
BIU T1 I RealRAM(p):0011046c=b7(·); RAM(p):0011046c=b7(·); Physical(p):0011046c=b7(·); Paged(p):c000146c=b7(·); Normal(p):c000146c=b7(·); RealRAM(p):0011046d=13(); RAM(p):0011046d=13(); Physical(p):0011046d=13(); Paged(p):c000146d=13(); Normal(p):c000146d=13()
BIU T1 - 0028:c000145f 8B CD mov ecx,ebp
Registers:
EAX: 00000000 EBX: c15200e8 ECX: 00000000 EDX: c1029654
ESP: c13fbe68 EBP: c13fbe68 ESI: 00000034 EDI: c1590030
CS: 0028 DS: 0000 ES: 0030 FS: 018f GS: 0000 SS: 0030 TR: 0018 LDTR: 00d8
EIP: c000145f EFLAGS: 00000083
CR0: 80000011 CR2: bff8d000 CR3: 004bf000 CR4: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 0000c005c0e001f7 IDTR: 0000800a900002ff
CS descriptor: 00CF9B000000FFFF
SS descriptor: 00CF93000000FFFF
DS descriptor: 00CF13000000FFFF
ES descriptor: 00CF93000000FFFF
FS descriptor: 8100F38022F40033
GS descriptor: 00CF13000000FFFF
TR descriptor: C0008B00AEBC2069
LDTR descriptor: 8000820990001FFF
FLAGSINFO: 0000000000ipfavr0n00oditSz0a0p1C
BIU T1 I RealRAM(p):0011046e=00( ); RAM(p):0011046e=00( ); Physical(p):0011046e=00( ); Paged(p):c000146e=00( ); Normal(p):c000146e=00( ); RealRAM(p):0011046f=c0(À); RAM(p):0011046f=c0(À); Physical(p):0011046f=c0(À); Paged(p):c000146f=c0(À); Normal(p):c000146f=c0(À)
BIU T1 - 0028:c0001461 8B 45 24 mov eax,dword ss:[ebp+24] RealRAM(r):043c7e8c=bb(»); RAM(r):043c7e8c=bb(»); Physical(r):043c7e8c=bb(»); Paged(r):c13fbe8c=bb(»); RealRAM(r):043c7e8d=13(); RAM(r):043c7e8d=13(); Physical(r):043c7e8d=13(); Paged(r):c13fbe8d=13(); RealRAM(r):043c7e8e=00( ); RAM(r):043c7e8e=00( ); Physical(r):043c7e8e=00( ); Paged(r):c13fbe8e=00( ); RealRAM(r):043c7e8f=c0(À); RAM(r):043c7e8f=c0(À); Physical(r):043c7e8f=c0(À); Paged(r):c13fbe8f=c0(À)
Registers:
EAX: 00000000 EBX: c15200e8 ECX: c13fbe68 EDX: c1029654
ESP: c13fbe68 EBP: c13fbe68 ESI: 00000034 EDI: c1590030
CS: 0028 DS: 0000 ES: 0030 FS: 018f GS: 0000 SS: 0030 TR: 0018 LDTR: 00d8
EIP: c0001461 EFLAGS: 00000083
CR0: 80000011 CR2: bff8d000 CR3: 004bf000 CR4: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 0000c005c0e001f7 IDTR: 0000800a900002ff
CS descriptor: 00CF9B000000FFFF
SS descriptor: 00CF93000000FFFF
DS descriptor: 00CF13000000FFFF
ES descriptor: 00CF93000000FFFF
FS descriptor: 8100F38022F40033
GS descriptor: 00CF13000000FFFF
TR descriptor: C0008B00AEBC2069
LDTR descriptor: 8000820990001FFF
FLAGSINFO: 0000000000ipfavr0n00oditSz0a0p1C
BIU T1 I RealRAM(p):00110470=74(t); RAM(p):00110470=74(t); Physical(p):00110470=74(t); Paged(p):c0001470=74(t); Normal(p):c0001470=74(t); RealRAM(p):00110471=1e(); RAM(p):00110471=1e(); Physical(p):00110471=1e(); Paged(p):c0001471=1e(); Normal(p):c0001471=1e(); RealRAM(p):00110472=8d(); RAM(p):00110472=8d(); Physical(p):00110472=8d(); Paged(p):c0001472=8d(); Normal(p):c0001472=8d()
BIU T1 - 0028:c0001464 2E 8B 6B 08 mov ebp,dword cs:[ebx+08] RealRAM(r):0438a0f0=70(p); RAM(r):0438a0f0=70(p); Physical(r):0438a0f0=70(p); Paged(r):c15200f0=70(p); RealRAM(r):0438a0f1=bf(¿); RAM(r):0438a0f1=bf(¿); Physical(r):0438a0f1=bf(¿); Paged(r):c15200f1=bf(¿); RealRAM(r):0438a0f2=3f(?); RAM(r):0438a0f2=3f(?); Physical(r):0438a0f2=3f(?); Paged(r):c15200f2=3f(?); RealRAM(r):0438a0f3=c1(Á); RAM(r):0438a0f3=c1(Á); Physical(r):0438a0f3=c1(Á); Paged(r):c15200f3=c1(Á)
Registers:
EAX: c00013bb EBX: c15200e8 ECX: c13fbe68 EDX: c1029654
ESP: c13fbe68 EBP: c13fbe68 ESI: 00000034 EDI: c1590030
CS: 0028 DS: 0000 ES: 0030 FS: 018f GS: 0000 SS: 0030 TR: 0018 LDTR: 00d8
EIP: c0001464 EFLAGS: 00000083
CR0: 80000011 CR2: bff8d000 CR3: 004bf000 CR4: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 0000c005c0e001f7 IDTR: 0000800a900002ff
CS descriptor: 00CF9B000000FFFF
SS descriptor: 00CF93000000FFFF
DS descriptor: 00CF13000000FFFF
ES descriptor: 00CF93000000FFFF
FS descriptor: 8100F38022F40033
GS descriptor: 00CF13000000FFFF
TR descriptor: C0008B00AEBC2069
LDTR descriptor: 8000820990001FFF
FLAGSINFO: 0000000000ipfavr0n00oditSz0a0p1C
BIU T1 I RealRAM(p):00110473=55(U); RAM(p):00110473=55(U); Physical(p):00110473=55(U); Paged(p):c0001473=55(U); Normal(p):c0001473=55(U); RealRAM(p):00110474=38(8); RAM(p):00110474=38(8); Physical(p):00110474=38(8); Paged(p):c0001474=38(8); Normal(p):c0001474=38(8); RealRAM(p):00110475=3d(=); RAM(p):00110475=3d(=); Physical(p):00110475=3d(=); Paged(p):c0001475=3d(=); Normal(p):c0001475=3d(=); RealRAM(p):00110476=bb(»); RAM(p):00110476=bb(»); Physical(p):00110476=bb(»); Paged(p):c0001476=bb(»); Normal(p):c0001476=bb(»)
BIU T1 - 0028:c0001468 8D 55 3C lea edx,dword ss:[ebp+3c]
Registers:
EAX: c00013bb EBX: c15200e8 ECX: c13fbe68 EDX: c1029654
ESP: c13fbe68 EBP: c13fbf70 ESI: 00000034 EDI: c1590030
CS: 0028 DS: 0000 ES: 0030 FS: 018f GS: 0000 SS: 0030 TR: 0018 LDTR: 00d8
EIP: c0001468 EFLAGS: 00000083
CR0: 80000011 CR2: bff8d000 CR3: 004bf000 CR4: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 0000c005c0e001f7 IDTR: 0000800a900002ff
CS descriptor: 00CF9B000000FFFF
SS descriptor: 00CF93000000FFFF
DS descriptor: 00CF13000000FFFF
ES descriptor: 00CF93000000FFFF
FS descriptor: 8100F38022F40033
GS descriptor: 00CF13000000FFFF
TR descriptor: C0008B00AEBC2069
LDTR descriptor: 8000820990001FFF
FLAGSINFO: 0000000000ipfavr0n00oditSz0a0p1C
BIU T1 I RealRAM(p):00110477=13(); RAM(p):00110477=13(); Physical(p):00110477=13(); Paged(p):c0001477=13(); Normal(p):c0001477=13(); RealRAM(p):00110478=00( ); RAM(p):00110478=00( ); Physical(p):00110478=00( ); Paged(p):c0001478=00( ); Normal(p):c0001478=00( ); RealRAM(p):00110479=c0(À); RAM(p):00110479=c0(À); Physical(p):00110479=c0(À); Paged(p):c0001479=c0(À); Normal(p):c0001479=c0(À)
BIU T1 - 0028:c000146b 3D B7 13 00 C0 cmp eax,c00013b7
Registers:
EAX: c00013bb EBX: c15200e8 ECX: c13fbe68 EDX: c13fbfac
ESP: c13fbe68 EBP: c13fbf70 ESI: 00000034 EDI: c1590030
CS: 0028 DS: 0000 ES: 0030 FS: 018f GS: 0000 SS: 0030 TR: 0018 LDTR: 00d8
EIP: c000146b EFLAGS: 00000083
CR0: 80000011 CR2: bff8d000 CR3: 004bf000 CR4: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 0000c005c0e001f7 IDTR: 0000800a900002ff
CS descriptor: 00CF9B000000FFFF
SS descriptor: 00CF93000000FFFF
DS descriptor: 00CF13000000FFFF
ES descriptor: 00CF93000000FFFF
FS descriptor: 8100F38022F40033
GS descriptor: 00CF13000000FFFF
TR descriptor: C0008B00AEBC2069
LDTR descriptor: 8000820990001FFF
FLAGSINFO: 0000000000ipfavr0n00oditSz0a0p1C
BIU T1 I RealRAM(p):0011047a=74(t); RAM(p):0011047a=74(t); Physical(p):0011047a=74(t); Paged(p):c000147a=74(t); Normal(p):c000147a=74(t); RealRAM(p):0011047b=14(); RAM(p):0011047b=14(); Physical(p):0011047b=14(); Paged(p):c000147b=14(); Normal(p):c000147b=14(); RealRAM(p):0011047c=8d(); RAM(p):0011047c=8d(); Physical(p):0011047c=8d(); Paged(p):c000147c=8d(); Normal(p):c000147c=8d(); RealRAM(p):0011047d=55(U); RAM(p):0011047d=55(U); Physical(p):0011047d=55(U); Paged(p):c000147d=55(U); Normal(p):c000147d=55(U); RealRAM(p):0011047e=40(@); RAM(p):0011047e=40(@); Physical(p):0011047e=40(@); Paged(p):c000147e=40(@); Normal(p):c000147e=40(@)
BIU T1 - 0028:c0001470 74 1E jz c0001490
Registers:
EAX: c00013bb EBX: c15200e8 ECX: c13fbe68 EDX: c13fbfac
ESP: c13fbe68 EBP: c13fbf70 ESI: 00000034 EDI: c1590030
CS: 0028 DS: 0000 ES: 0030 FS: 018f GS: 0000 SS: 0030 TR: 0018 LDTR: 00d8
EIP: c0001470 EFLAGS: 00000002
CR0: 80000011 CR2: bff8d000 CR3: 004bf000 CR4: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 0000c005c0e001f7 IDTR: 0000800a900002ff
CS descriptor: 00CF9B000000FFFF
SS descriptor: 00CF93000000FFFF
DS descriptor: 00CF13000000FFFF
ES descriptor: 00CF93000000FFFF
FS descriptor: 8100F38022F40033
GS descriptor: 00CF13000000FFFF
TR descriptor: C0008B00AEBC2069
LDTR descriptor: 8000820990001FFF
FLAGSINFO: 0000000000ipfavr0n00oditsz0a0p1c
BIU T1 I RealRAM(p):0011047f=3d(=); RAM(p):0011047f=3d(=); Physical(p):0011047f=3d(=); Paged(p):c000147f=3d(=); Normal(p):c000147f=3d(=); RealRAM(p):00110480=bf(¿); RAM(p):00110480=bf(¿); Physical(p):00110480=bf(¿); Paged(p):c0001480=bf(¿); Normal(p):c0001480=bf(¿)
BIU T1 - 0028:c0001472 8D 55 38 lea edx,dword ss:[ebp+38]
Registers:
EAX: c00013bb EBX: c15200e8 ECX: c13fbe68 EDX: c13fbfac
ESP: c13fbe68 EBP: c13fbf70 ESI: 00000034 EDI: c1590030
CS: 0028 DS: 0000 ES: 0030 FS: 018f GS: 0000 SS: 0030 TR: 0018 LDTR: 00d8
EIP: c0001472 EFLAGS: 00000002
CR0: 80000011 CR2: bff8d000 CR3: 004bf000 CR4: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 0000c005c0e001f7 IDTR: 0000800a900002ff
CS descriptor: 00CF9B000000FFFF
SS descriptor: 00CF93000000FFFF
DS descriptor: 00CF13000000FFFF
ES descriptor: 00CF93000000FFFF
FS descriptor: 8100F38022F40033
GS descriptor: 00CF13000000FFFF
TR descriptor: C0008B00AEBC2069
LDTR descriptor: 8000820990001FFF
FLAGSINFO: 0000000000ipfavr0n00oditsz0a0p1c
BIU T1 I RealRAM(p):00110481=13(); RAM(p):00110481=13(); Physical(p):00110481=13(); Paged(p):c0001481=13(); Normal(p):c0001481=13(); RealRAM(p):00110482=00( ); RAM(p):00110482=00( ); Physical(p):00110482=00( ); Paged(p):c0001482=00( ); Normal(p):c0001482=00( ); RealRAM(p):00110483=c0(À); RAM(p):00110483=c0(À); Physical(p):00110483=c0(À); Paged(p):c0001483=c0(À); Normal(p):c0001483=c0(À)
BIU T1 - 0028:c0001475 3D BB 13 00 C0 cmp eax,c00013bb
Registers:
EAX: c00013bb EBX: c15200e8 ECX: c13fbe68 EDX: c13fbfa8
ESP: c13fbe68 EBP: c13fbf70 ESI: 00000034 EDI: c1590030
CS: 0028 DS: 0000 ES: 0030 FS: 018f GS: 0000 SS: 0030 TR: 0018 LDTR: 00d8
EIP: c0001475 EFLAGS: 00000002
CR0: 80000011 CR2: bff8d000 CR3: 004bf000 CR4: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 0000c005c0e001f7 IDTR: 0000800a900002ff
CS descriptor: 00CF9B000000FFFF
SS descriptor: 00CF93000000FFFF
DS descriptor: 00CF13000000FFFF
ES descriptor: 00CF93000000FFFF
FS descriptor: 8100F38022F40033
GS descriptor: 00CF13000000FFFF
TR descriptor: C0008B00AEBC2069
LDTR descriptor: 8000820990001FFF
FLAGSINFO: 0000000000ipfavr0n00oditsz0a0p1c
BIU T1 I RealRAM(p):00110484=74(t); RAM(p):00110484=74(t); Physical(p):00110484=74(t); Paged(p):c0001484=74(t); Normal(p):c0001484=74(t); RealRAM(p):00110485=0a( ); RAM(p):00110485=0a( ); Physical(p):00110485=0a( ); Paged(p):c0001485=0a( ); Normal(p):c0001485=0a( ); RealRAM(p):00110486=8d(); RAM(p):00110486=8d(); Physical(p):00110486=8d(); Paged(p):c0001486=8d(); Normal(p):c0001486=8d(); RealRAM(p):00110487=55(U); RAM(p):00110487=55(U); Physical(p):00110487=55(U); Paged(p):c0001487=55(U); Normal(p):c0001487=55(U); RealRAM(p):00110488=44(D); RAM(p):00110488=44(D); Physical(p):00110488=44(D); Paged(p):c0001488=44(D); Normal(p):c0001488=44(D)
BIU T1 E 0028:c000147a 74 14 jz c0001490
Registers:
EAX: c00013bb EBX: c15200e8 ECX: c13fbe68 EDX: c13fbfa8
ESP: c13fbe68 EBP: c13fbf70 ESI: 00000034 EDI: c1590030
CS: 0028 DS: 0000 ES: 0030 FS: 018f GS: 0000 SS: 0030 TR: 0018 LDTR: 00d8
EIP: c000147a EFLAGS: 00000046
CR0: 80000011 CR2: bff8d000 CR3: 004bf000 CR4: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 0000c005c0e001f7 IDTR: 0000800a900002ff
CS descriptor: 00CF9B000000FFFF
SS descriptor: 00CF93000000FFFF
DS descriptor: 00CF13000000FFFF
ES descriptor: 00CF93000000FFFF
FS descriptor: 8100F38022F40033
GS descriptor: 00CF13000000FFFF
TR descriptor: C0008B00AEBC2069
LDTR descriptor: 8000820990001FFF
FLAGSINFO: 0000000000ipfavr0n00oditsZ0a0P1c
BIU T1 I RealRAM(p):00110490=83(ƒ); RAM(p):00110490=83(ƒ); Physical(p):00110490=83(ƒ); Paged(p):c0001490=83(ƒ); Normal(p):c0001490=83(ƒ); RealRAM(p):00110491=fe(þ); RAM(p):00110491=fe(þ); Physical(p):00110491=fe(þ); Paged(p):c0001491=fe(þ); Normal(p):c0001491=fe(þ); RealRAM(p):00110492=34(4); RAM(p):00110492=34(4); Physical(p):00110492=34(4); Paged(p):c0001492=34(4); Normal(p):c0001492=34(4); RealRAM(p):00110493=74(t); RAM(p):00110493=74(t); Physical(p):00110493=74(t); Paged(p):c0001493=74(t); Normal(p):c0001493=74(t); RealRAM(p):00110494=1e(); RAM(p):00110494=1e(); Physical(p):00110494=1e(); Paged(p):c0001494=1e(); Normal(p):c0001494=1e(); RealRAM(p):00110495=87(‡); RAM(p):00110495=87(‡); Physical(p):00110495=87(‡); Paged(p):c0001495=87(‡); Normal(p):c0001495=87(‡); RealRAM(p):00110496=e9(é); RAM(p):00110496=e9(é); Physical(p):00110496=e9(é); Paged(p):c0001496=e9(é); Normal(p):c0001496=e9(é); RealRAM(p):00110497=c7(Ç); RAM(p):00110497=c7(Ç); Physical(p):00110497=c7(Ç); Paged(p):c0001497=c7(Ç); Normal(p):c0001497=c7(Ç); RealRAM(p):00110498=45(E); RAM(p):00110498=45(E); Physical(p):00110498=45(E); Paged(p):c0001498=45(E); Normal(p):c0001498=45(E); RealRAM(p):00110499=24($); RAM(p):00110499=24($); Physical(p):00110499=24($); Paged(p):c0001499=24($); Normal(p):c0001499=24($); RealRAM(p):0011049a=8d(); RAM(p):0011049a=8d(); Physical(p):0011049a=8d(); Paged(p):c000149a=8d(); Normal(p):c000149a=8d(); RealRAM(p):0011049b=13(); RAM(p):0011049b=13(); Physical(p):0011049b=13(); Paged(p):c000149b=13(); Normal(p):c000149b=13(); RealRAM(p):0011049c=00( ); RAM(p):0011049c=00( ); Physical(p):0011049c=00( ); Paged(p):c000149c=00( ); Normal(p):c000149c=00( ); RealRAM(p):0011049d=c0(À); RAM(p):0011049d=c0(À); Physical(p):0011049d=c0(À); Paged(p):c000149d=c0(À); Normal(p):c000149d=c0(À); RealRAM(p):0011049e=89(‰); RAM(p):0011049e=89(‰); Physical(p):0011049e=89(‰); Paged(p):c000149e=89(‰); Normal(p):c000149e=89(‰)
BIU T1 - 0028:c0001490 83 FE 34 cmp esi,34
Registers:
EAX: c00013bb EBX: c15200e8 ECX: c13fbe68 EDX: c13fbfa8
ESP: c13fbe68 EBP: c13fbf70 ESI: 00000034 EDI: c1590030
CS: 0028 DS: 0000 ES: 0030 FS: 018f GS: 0000 SS: 0030 TR: 0018 LDTR: 00d8
EIP: c0001490 EFLAGS: 00000046
CR0: 80000011 CR2: bff8d000 CR3: 004bf000 CR4: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 0000c005c0e001f7 IDTR: 0000800a900002ff
CS descriptor: 00CF9B000000FFFF
SS descriptor: 00CF93000000FFFF
DS descriptor: 00CF13000000FFFF
ES descriptor: 00CF93000000FFFF
FS descriptor: 8100F38022F40033
GS descriptor: 00CF13000000FFFF
TR descriptor: C0008B00AEBC2069
LDTR descriptor: 8000820990001FFF
FLAGSINFO: 0000000000ipfavr0n00oditsZ0a0P1c
BIU T1 I RealRAM(p):0011049f=75(u); RAM(p):0011049f=75(u); Physical(p):0011049f=75(u); Paged(p):c000149f=75(u); Normal(p):c000149f=75(u); RealRAM(p):001104a0=04(); RAM(p):001104a0=04(); Physical(p):001104a0=04(); Paged(p):c00014a0=04(); Normal(p):c00014a0=04(); RealRAM(p):001104a1=89(‰); RAM(p):001104a1=89(‰); Physical(p):001104a1=89(‰); Paged(p):c00014a1=89(‰); Normal(p):c00014a1=89(‰)
BIU T1 E 0028:c0001493 74 1E jz c00014b3
Registers:
EAX: c00013bb EBX: c15200e8 ECX: c13fbe68 EDX: c13fbfa8
ESP: c13fbe68 EBP: c13fbf70 ESI: 00000034 EDI: c1590030
CS: 0028 DS: 0000 ES: 0030 FS: 018f GS: 0000 SS: 0030 TR: 0018 LDTR: 00d8
EIP: c0001493 EFLAGS: 00000046
CR0: 80000011 CR2: bff8d000 CR3: 004bf000 CR4: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 0000c005c0e001f7 IDTR: 0000800a900002ff
CS descriptor: 00CF9B000000FFFF
SS descriptor: 00CF93000000FFFF
DS descriptor: 00CF13000000FFFF
ES descriptor: 00CF93000000FFFF
FS descriptor: 8100F38022F40033
GS descriptor: 00CF13000000FFFF
TR descriptor: C0008B00AEBC2069
LDTR descriptor: 8000820990001FFF
FLAGSINFO: 0000000000ipfavr0n00oditsZ0a0P1c
BIU T1 I RealRAM(p):001104b3=66(f); RAM(p):001104b3=66(f); Physical(p):001104b3=66(f); Paged(p):c00014b3=66(f); Normal(p):c00014b3=66(f); RealRAM(p):001104b4=36(6); RAM(p):001104b4=36(6); Physical(p):001104b4=36(6); Paged(p):c00014b4=36(6); Normal(p):c00014b4=36(6); RealRAM(p):001104b5=c7(Ç); RAM(p):001104b5=c7(Ç); Physical(p):001104b5=c7(Ç); Paged(p):c00014b5=c7(Ç); Normal(p):c00014b5=c7(Ç); RealRAM(p):001104b6=02(); RAM(p):001104b6=02(); Physical(p):001104b6=02(); Paged(p):c00014b6=02(); Normal(p):c00014b6=02(); RealRAM(p):001104b7=00( ); RAM(p):001104b7=00( ); Physical(p):001104b7=00( ); Paged(p):c00014b7=00( ); Normal(p):c00014b7=00( ); RealRAM(p):001104b8=00( ); RAM(p):001104b8=00( ); Physical(p):001104b8=00( ); Paged(p):c00014b8=00( ); Normal(p):c00014b8=00( ); RealRAM(p):001104b9=61(a); RAM(p):001104b9=61(a); Physical(p):001104b9=61(a); Paged(p):c00014b9=61(a); Normal(p):c00014b9=61(a); RealRAM(p):001104ba=83(ƒ); RAM(p):001104ba=83(ƒ); Physical(p):001104ba=83(ƒ); Paged(p):c00014ba=83(ƒ); Normal(p):c00014ba=83(ƒ); RealRAM(p):001104bb=c4(Ä); RAM(p):001104bb=c4(Ä); Physical(p):001104bb=c4(Ä); Paged(p):c00014bb=c4(Ä); Normal(p):c00014bb=c4(Ä); RealRAM(p):001104bc=04(); RAM(p):001104bc=04(); Physical(p):001104bc=04(); Paged(p):c00014bc=04(); Normal(p):c00014bc=04(); RealRAM(p):001104bd=cf(Ï); RAM(p):001104bd=cf(Ï); Physical(p):001104bd=cf(Ï); Paged(p):c00014bd=cf(Ï); Normal(p):c00014bd=cf(Ï); RealRAM(p):001104be=1e(); RAM(p):001104be=1e(); Physical(p):001104be=1e(); Paged(p):c00014be=1e(); Normal(p):c00014be=1e(); RealRAM(p):001104bf=06(); RAM(p):001104bf=06(); Physical(p):001104bf=06(); Paged(p):c00014bf=06(); Normal(p):c00014bf=06(); RealRAM(p):001104c0=8e(Ž); RAM(p):001104c0=8e(Ž); Physical(p):001104c0=8e(Ž); Paged(p):c00014c0=8e(Ž); Normal(p):c00014c0=8e(Ž); RealRAM(p):001104c1=df(ß); RAM(p):001104c1=df(ß); Physical(p):001104c1=df(ß); Paged(p):c00014c1=df(ß); Normal(p):c00014c1=df(ß)
Registers:
EAX: c00013bb EBX: c15200e8 ECX: c13fbe68 EDX: c13fbfa8
ESP: c13fbe68 EBP: c13fbf70 ESI: 00000034 EDI: c1590030
CS: 0028 DS: 0000 ES: 0030 FS: 018f GS: 0000 SS: 0030 TR: 0018 LDTR: 00d8
EIP: c00014b3 EFLAGS: 00000046
CR0: 80000011 CR2: bff8d000 CR3: 004bf000 CR4: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 0000c005c0e001f7 IDTR: 0000800a900002ff
CS descriptor: 00CF9B000000FFFF
SS descriptor: 00CF93000000FFFF
DS descriptor: 00CF13000000FFFF
ES descriptor: 00CF93000000FFFF
FS descriptor: 8100F38022F40033
GS descriptor: 00CF13000000FFFF
TR descriptor: C0008B00AEBC2069
LDTR descriptor: 8000820990001FFF
FLAGSINFO: 0000000000ipfavr0n00oditsZ0a0P1c
BIU T1 I ^ 66 36 C7 02 00 00 mov word ss:[edx],0000 Paged(w):c13fbfa8=00( ); Physical(w):043c7fa8=00( ); RAM(w):043c7fa8=00( ); RealRAM(w):043c7fa8=00( ); Paged(w):c13fbfa9=00( ); Physical(w):043c7fa9=00( ); RAM(w):043c7fa9=00( ); RealRAM(w):043c7fa9=00( ); RealRAM(p):001104c2=8e(Ž); RAM(p):001104c2=8e(Ž); Physical(p):001104c2=8e(Ž); Paged(p):c00014c2=8e(Ž); Normal(p):c00014c2=8e(Ž); RealRAM(p):001104c3=c7(Ç); RAM(p):001104c3=c7(Ç); Physical(p):001104c3=c7(Ç); Paged(p):c00014c3=c7(Ç); Normal(p):c00014c3=c7(Ç); RealRAM(p):001104c4=66(f); RAM(p):001104c4=66(f); Physical(p):001104c4=66(f); Paged(p):c00014c4=66(f); Normal(p):c00014c4=66(f); RealRAM(p):001104c5=8b(‹); RAM(p):001104c5=8b(‹); Physical(p):001104c5=8b(‹); Paged(p):c00014c5=8b(‹); Normal(p):c00014c5=8b(‹); RealRAM(p):001104c6=ec(ì); RAM(p):001104c6=ec(ì); Physical(p):001104c6=ec(ì); Paged(p):c00014c6=ec(ì); Normal(p):c00014c6=ec(ì); RealRAM(p):001104c7=8e(Ž); RAM(p):001104c7=8e(Ž); Physical(p):001104c7=8e(Ž); Paged(p):c00014c7=8e(Ž); Normal(p):c00014c7=8e(Ž)
BIU T1 - 0028:c00014b9 61 popad RealRAM(r):043c7e68=68(h); RAM(r):043c7e68=68(h); Physical(r):043c7e68=68(h); Paged(r):c13fbe68=68(h); RealRAM(r):043c7e69=f0(ð); RAM(r):043c7e69=f0(ð); Physical(r):043c7e69=f0(ð); Paged(r):c13fbe69=f0(ð); RealRAM(r):043c7e6a=59(Y); RAM(r):043c7e6a=59(Y); Physical(r):043c7e6a=59(Y); Paged(r):c13fbe6a=59(Y); RealRAM(r):043c7e6b=c1(Á); RAM(r):043c7e6b=c1(Á); Physical(r):043c7e6b=c1(Á); Paged(r):c13fbe6b=c1(Á); RealRAM(r):043c7e6c=d4(Ô); RAM(r):043c7e6c=d4(Ô); Physical(r):043c7e6c=d4(Ô); Paged(r):c13fbe6c=d4(Ô); RealRAM(r):043c7e6d=be(¾); RAM(r):043c7e6d=be(¾); Physical(r):043c7e6d=be(¾); Paged(r):c13fbe6d=be(¾); RealRAM(r):043c7e6e=3f(?); RAM(r):043c7e6e=3f(?); Physical(r):043c7e6e=3f(?); Paged(r):c13fbe6e=3f(?); RealRAM(r):043c7e6f=c1(Á); RAM(r):043c7e6f=c1(Á); Physical(r):043c7e6f=c1(Á); Paged(r):c13fbe6f=c1(Á); RealRAM(r):043c7e70=70(p); RAM(r):043c7e70=70(p); Physical(r):043c7e70=70(p); Paged(r):c13fbe70=70(p); RealRAM(r):043c7e71=bf(¿); RAM(r):043c7e71=bf(¿); Physical(r):043c7e71=bf(¿); Paged(r):c13fbe71=bf(¿); RealRAM(r):043c7e72=3f(?); RAM(r):043c7e72=3f(?); Physical(r):043c7e72=3f(?); Paged(r):c13fbe72=3f(?); RealRAM(r):043c7e73=c1(Á); RAM(r):043c7e73=c1(Á); Physical(r):043c7e73=c1(Á); Paged(r):c13fbe73=c1(Á); RealRAM(r):043c7e74=88(ˆ); RAM(r):043c7e74=88(ˆ); Physical(r):043c7e74=88(ˆ); Paged(r):c13fbe74=88(ˆ); RealRAM(r):043c7e75=be(¾); RAM(r):043c7e75=be(¾); Physical(r):043c7e75=be(¾); Paged(r):c13fbe75=be(¾); RealRAM(r):043c7e76=3f(?); RAM(r):043c7e76=3f(?); Physical(r):043c7e76=3f(?); Paged(r):c13fbe76=3f(?); RealRAM(r):043c7e77=c1(Á); RAM(r):043c7e77=c1(Á); Physical(r):043c7e77=c1(Á); Paged(r):c13fbe77=c1(Á); RealRAM(r):043c7e78=e8(è); RAM(r):043c7e78=e8(è); Physical(r):043c7e78=e8(è); Paged(r):c13fbe78=e8(è); RealRAM(r):043c7e79=00( ); RAM(r):043c7e79=00( ); Physical(r):043c7e79=00( ); Paged(r):c13fbe79=00( ); RealRAM(r):043c7e7a=52(R); RAM(r):043c7e7a=52(R); Physical(r):043c7e7a=52(R); Paged(r):c13fbe7a=52(R); RealRAM(r):043c7e7b=c1(Á); RAM(r):043c7e7b=c1(Á); Physical(r):043c7e7b=c1(Á); Paged(r):c13fbe7b=c1(Á); RealRAM(r):043c7e7c=54(T); RAM(r):043c7e7c=54(T); Physical(r):043c7e7c=54(T); Paged(r):c13fbe7c=54(T); RealRAM(r):043c7e7d=96(–); RAM(r):043c7e7d=96(–); Physical(r):043c7e7d=96(–); Paged(r):c13fbe7d=96(–); RealRAM(r):043c7e7e=02(); RAM(r):043c7e7e=02(); Physical(r):043c7e7e=02(); Paged(r):c13fbe7e=02(); RealRAM(r):043c7e7f=c1(Á); RAM(r):043c7e7f=c1(Á); Physical(r):043c7e7f=c1(Á); Paged(r):c13fbe7f=c1(Á); RealRAM(r):043c7e80=00( ); RAM(r):043c7e80=00( ); Physical(r):043c7e80=00( ); Paged(r):c13fbe80=00( ); RealRAM(r):043c7e81=00( ); RAM(r):043c7e81=00( ); Physical(r):043c7e81=00( ); Paged(r):c13fbe81=00( ); RealRAM(r):043c7e82=00( ); RAM(r):043c7e82=00( ); Physical(r):043c7e82=00( ); Paged(r):c13fbe82=00( ); RealRAM(r):043c7e83=00( ); RAM(r):043c7e83=00( ); Physical(r):043c7e83=00( ); Paged(r):c13fbe83=00( ); RealRAM(r):043c7e84=00( ); RAM(r):043c7e84=00( ); Physical(r):043c7e84=00( ); Paged(r):c13fbe84=00( ); RealRAM(r):043c7e85=00( ); RAM(r):043c7e85=00( ); Physical(r):043c7e85=00( ); Paged(r):c13fbe85=00( ); RealRAM(r):043c7e86=00( ); RAM(r):043c7e86=00( ); Physical(r):043c7e86=00( ); Paged(r):c13fbe86=00( ); RealRAM(r):043c7e87=00( ); RAM(r):043c7e87=00( ); Physical(r):043c7e87=00( ); Paged(r):c13fbe87=00( )
Registers:
EAX: c00013bb EBX: c15200e8 ECX: c13fbe68 EDX: c13fbfa8
ESP: c13fbe68 EBP: c13fbf70 ESI: 00000034 EDI: c1590030
CS: 0028 DS: 0000 ES: 0030 FS: 018f GS: 0000 SS: 0030 TR: 0018 LDTR: 00d8
EIP: c00014b9 EFLAGS: 00000046
CR0: 80000011 CR2: bff8d000 CR3: 004bf000 CR4: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 0000c005c0e001f7 IDTR: 0000800a900002ff
CS descriptor: 00CF9B000000FFFF
SS descriptor: 00CF93000000FFFF
DS descriptor: 00CF13000000FFFF
ES descriptor: 00CF93000000FFFF
FS descriptor: 8100F38022F40033
GS descriptor: 00CF13000000FFFF
TR descriptor: C0008B00AEBC2069
LDTR descriptor: 8000820990001FFF
FLAGSINFO: 0000000000ipfavr0n00oditsZ0a0P1c
BIU T1 I RealRAM(p):001104c8=d7(×); RAM(p):001104c8=d7(×); Physical(p):001104c8=d7(×); Paged(p):c00014c8=d7(×); Normal(p):c00014c8=d7(×)
BIU T1 - 0028:c00014ba 83 C4 04 add esp,04
Registers:
EAX: 00000000 EBX: c15200e8 ECX: 00000000 EDX: c1029654
ESP: c13fbe88 EBP: c13fbf70 ESI: c13fbed4 EDI: c159f068
CS: 0028 DS: 0000 ES: 0030 FS: 018f GS: 0000 SS: 0030 TR: 0018 LDTR: 00d8
EIP: c00014ba EFLAGS: 00000046
CR0: 80000011 CR2: bff8d000 CR3: 004bf000 CR4: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 0000c005c0e001f7 IDTR: 0000800a900002ff
CS descriptor: 00CF9B000000FFFF
SS descriptor: 00CF93000000FFFF
DS descriptor: 00CF13000000FFFF
ES descriptor: 00CF93000000FFFF
FS descriptor: 8100F38022F40033
GS descriptor: 00CF13000000FFFF
TR descriptor: C0008B00AEBC2069
LDTR descriptor: 8000820990001FFF
FLAGSINFO: 0000000000ipfavr0n00oditsZ0a0P1c
BIU T1 I RealRAM(p):001104c9=8b(‹); RAM(p):001104c9=8b(‹); Physical(p):001104c9=8b(‹); Paged(p):c00014c9=8b(‹); Normal(p):c00014c9=8b(‹); RealRAM(p):001104ca=e5(å); RAM(p):001104ca=e5(å); Physical(p):001104ca=e5(å); Paged(p):c00014ca=e5(å); Normal(p):c00014ca=e5(å); RealRAM(p):001104cb=66(f); RAM(p):001104cb=66(f); Physical(p):001104cb=66(f); Paged(p):c00014cb=66(f); Normal(p):c00014cb=66(f)
MMU: Reading from real(r): 004be108=ff (ÿ)
Reading from RAM(r): 004be108=ff (ÿ)
Reading from physical memory(r): 004be108=ff (ÿ)
Reading from paged memory(r): c005c108=ff (ÿ)
MMU: Reading from real(r): 004be109=ff (ÿ)
Reading from RAM(r): 004be109=ff (ÿ)
Reading from physical memory(r): 004be109=ff (ÿ)
Reading from paged memory(r): c005c109=ff (ÿ)
MMU: Reading from real(r): 004be10a=00 ( )
Reading from RAM(r): 004be10a=00 ( )
Reading from physical memory(r): 004be10a=00 ( )
Reading from paged memory(r): c005c10a=00 ( )
MMU: Reading from real(r): 004be10b=00 ( )
Reading from RAM(r): 004be10b=00 ( )
Reading from physical memory(r): 004be10b=00 ( )
Reading from paged memory(r): c005c10b=00 ( )
MMU: Reading from real(r): 004be10c=00 ( )
Reading from RAM(r): 004be10c=00 ( )
Reading from physical memory(r): 004be10c=00 ( )
Reading from paged memory(r): c005c10c=00 ( )
MMU: Reading from real(r): 004be10d=9b (›)
Reading from RAM(r): 004be10d=9b (›)
Reading from physical memory(r): 004be10d=9b (›)
Reading from paged memory(r): c005c10d=9b (›)
MMU: Reading from real(r): 004be10e=cf (Ï)
Reading from RAM(r): 004be10e=cf (Ï)
Reading from physical memory(r): 004be10e=cf (Ï)
Reading from paged memory(r): c005c10e=cf (Ï)
MMU: Reading from real(r): 004be10f=00 ( )
Reading from RAM(r): 004be10f=00 ( )
Reading from physical memory(r): 004be10f=00 ( )
Reading from paged memory(r): c005c10f=00 ( )
BIU T1 E 0028:c00014bd CF iretd RealRAM(r):043c7e8c=bb(»); RAM(r):043c7e8c=bb(»); Physical(r):043c7e8c=bb(»); Paged(r):c13fbe8c=bb(»); Normal(r):c13fbe8c=bb(»); RealRAM(r):043c7e8d=13(); RAM(r):043c7e8d=13(); Physical(r):043c7e8d=13(); Paged(r):c13fbe8d=13(); Normal(r):c13fbe8d=13(); RealRAM(r):043c7e8e=00( ); RAM(r):043c7e8e=00( ); Physical(r):043c7e8e=00( ); Paged(r):c13fbe8e=00( ); Normal(r):c13fbe8e=00( ); RealRAM(r):043c7e8f=c0(À); RAM(r):043c7e8f=c0(À); Physical(r):043c7e8f=c0(À); Paged(r):c13fbe8f=c0(À); Normal(r):c13fbe8f=c0(À); RealRAM(r):043c7e90=28((); RAM(r):043c7e90=28((); Physical(r):043c7e90=28((); Paged(r):c13fbe90=28((); Normal(r):c13fbe90=28((); RealRAM(r):043c7e91=00( ); RAM(r):043c7e91=00( ); Physical(r):043c7e91=00( ); Paged(r):c13fbe91=00( ); Normal(r):c13fbe91=00( ); RealRAM(r):043c7e94=16(); RAM(r):043c7e94=16(); Physical(r):043c7e94=16(); Paged(r):c13fbe94=16(); Normal(r):c13fbe94=16(); RealRAM(r):043c7e95=00( ); RAM(r):043c7e95=00( ); Physical(r):043c7e95=00( ); Paged(r):c13fbe95=00( ); Normal(r):c13fbe95=00( ); RealRAM(r):043c7e96=00( ); RAM(r):043c7e96=00( ); Physical(r):043c7e96=00( ); Paged(r):c13fbe96=00( ); Normal(r):c13fbe96=00( ); RealRAM(r):043c7e97=00( ); RAM(r):043c7e97=00( ); Physical(r):043c7e97=00( ); Paged(r):c13fbe97=00( ); Normal(r):c13fbe97=00( )
Registers:
EAX: 00000000 EBX: c15200e8 ECX: 00000000 EDX: c1029654
ESP: c13fbe8c EBP: c13fbf70 ESI: c13fbed4 EDI: c159f068
CS: 0028 DS: 0000 ES: 0030 FS: 018f GS: 0000 SS: 0030 TR: 0018 LDTR: 00d8
EIP: c00014bd EFLAGS: 00000082
CR0: 80000011 CR2: bff8d000 CR3: 004bf000 CR4: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 0000c005c0e001f7 IDTR: 0000800a900002ff
CS descriptor: 00CF9B000000FFFF
SS descriptor: 00CF93000000FFFF
DS descriptor: 00CF13000000FFFF
ES descriptor: 00CF93000000FFFF
FS descriptor: 8100F38022F40033
GS descriptor: 00CF13000000FFFF
TR descriptor: C0008B00AEBC2069
LDTR descriptor: 8000820990001FFF
FLAGSINFO: 0000000000ipfavr0n00oditSz0a0p1c
BIU T1 I RealRAM(p):001103bb=8e(Ž); RAM(p):001103bb=8e(Ž); Physical(p):001103bb=8e(Ž); Paged(p):c00013bb=8e(Ž); Normal(p):c00013bb=8e(Ž); RealRAM(p):001103bc=44(D); RAM(p):001103bc=44(D); Physical(p):001103bc=44(D); Paged(p):c00013bc=44(D); Normal(p):c00013bc=44(D); RealRAM(p):001103bd=24($); RAM(p):001103bd=24($); Physical(p):001103bd=24($); Paged(p):c00013bd=24($); Normal(p):c00013bd=24($); RealRAM(p):001103be=38(8); RAM(p):001103be=38(8); Physical(p):001103be=38(8); Paged(p):c00013be=38(8); Normal(p):c00013be=38(8); RealRAM(p):001103bf=8e(Ž); RAM(p):001103bf=8e(Ž); Physical(p):001103bf=8e(Ž); Paged(p):c00013bf=8e(Ž); Normal(p):c00013bf=8e(Ž); RealRAM(p):001103c0=64(d); RAM(p):001103c0=64(d); Physical(p):001103c0=64(d); Paged(p):c00013c0=64(d); Normal(p):c00013c0=64(d); RealRAM(p):001103c1=24($); RAM(p):001103c1=24($); Physical(p):001103c1=24($); Paged(p):c00013c1=24($); Normal(p):c00013c1=24($); RealRAM(p):001103c2=40(@); RAM(p):001103c2=40(@); Physical(p):001103c2=40(@); Paged(p):c00013c2=40(@); Normal(p):c00013c2=40(@); RealRAM(p):001103c3=8e(Ž); RAM(p):001103c3=8e(Ž); Physical(p):001103c3=8e(Ž); Paged(p):c00013c3=8e(Ž); Normal(p):c00013c3=8e(Ž); RealRAM(p):001103c4=6c(l); RAM(p):001103c4=6c(l); Physical(p):001103c4=6c(l); Paged(p):c00013c4=6c(l); Normal(p):c00013c4=6c(l); RealRAM(p):001103c5=24($); RAM(p):001103c5=24($); Physical(p):001103c5=24($); Paged(p):c00013c5=24($); Normal(p):c00013c5=24($); RealRAM(p):001103c6=44(D); RAM(p):001103c6=44(D); Physical(p):001103c6=44(D); Paged(p):c00013c6=44(D); Normal(p):c00013c6=44(D); RealRAM(p):001103c7=36(6); RAM(p):001103c7=36(6); Physical(p):001103c7=36(6); Paged(p):c00013c7=36(6); Normal(p):c00013c7=36(6); RealRAM(p):001103c8=f6(ö); RAM(p):001103c8=f6(ö); Physical(p):001103c8=f6(ö); Paged(p):c00013c8=f6(ö); Normal(p):c00013c8=f6(ö); RealRAM(p):001103c9=03(); RAM(p):001103c9=03(); Physical(p):001103c9=03(); Paged(p):c00013c9=03(); Normal(p):c00013c9=03()
MMU: Reading from real(r): 0039b068=b0 (°)
Reading from RAM(r): 0039b068=b0 (°)
Reading from physical memory(r): 0039b068=b0 (°)
Reading from paged memory(r): 800a9068=b0 (°)
MMU: Reading from real(r): 0039b069=12 ()
Reading from RAM(r): 0039b069=12 ()
Reading from physical memory(r): 0039b069=12 ()
Reading from paged memory(r): 800a9069=12 ()
MMU: Reading from real(r): 0039b06a=28 (()
Reading from RAM(r): 0039b06a=28 (()
Reading from physical memory(r): 0039b06a=28 (()
Reading from paged memory(r): 800a906a=28 (()
MMU: Reading from real(r): 0039b06b=00 ( )
Reading from RAM(r): 0039b06b=00 ( )
Reading from physical memory(r): 0039b06b=00 ( )
Reading from paged memory(r): 800a906b=00 ( )
MMU: Reading from real(r): 0039b06c=00 ( )
Reading from RAM(r): 0039b06c=00 ( )
Reading from physical memory(r): 0039b06c=00 ( )
Reading from paged memory(r): 800a906c=00 ( )
MMU: Reading from real(r): 0039b06d=8e (Ž)
Reading from RAM(r): 0039b06d=8e (Ž)
Reading from physical memory(r): 0039b06d=8e (Ž)
Reading from paged memory(r): 800a906d=8e (Ž)
MMU: Reading from real(r): 0039b06e=00 ( )
Reading from RAM(r): 0039b06e=00 ( )
Reading from physical memory(r): 0039b06e=00 ( )
Reading from paged memory(r): 800a906e=00 ( )
MMU: Reading from real(r): 0039b06f=c0 (À)
Reading from RAM(r): 0039b06f=c0 (À)
Reading from physical memory(r): 0039b06f=c0 (À)
Reading from paged memory(r): 800a906f=c0 (À)
MMU: Reading from real(r): 004be108=ff (ÿ)
Reading from RAM(r): 004be108=ff (ÿ)
Reading from physical memory(r): 004be108=ff (ÿ)
Reading from paged memory(r): c005c108=ff (ÿ)
MMU: Reading from real(r): 004be109=ff (ÿ)
Reading from RAM(r): 004be109=ff (ÿ)
Reading from physical memory(r): 004be109=ff (ÿ)
Reading from paged memory(r): c005c109=ff (ÿ)
MMU: Reading from real(r): 004be10a=00 ( )
Reading from RAM(r): 004be10a=00 ( )
Reading from physical memory(r): 004be10a=00 ( )
Reading from paged memory(r): c005c10a=00 ( )
MMU: Reading from real(r): 004be10b=00 ( )
Reading from RAM(r): 004be10b=00 ( )
Reading from physical memory(r): 004be10b=00 ( )
Reading from paged memory(r): c005c10b=00 ( )
MMU: Reading from real(r): 004be10c=00 ( )
Reading from RAM(r): 004be10c=00 ( )
Reading from physical memory(r): 004be10c=00 ( )
Reading from paged memory(r): c005c10c=00 ( )
MMU: Reading from real(r): 004be10d=9b (›)
Reading from RAM(r): 004be10d=9b (›)
Reading from physical memory(r): 004be10d=9b (›)
Reading from paged memory(r): c005c10d=9b (›)
MMU: Reading from real(r): 004be10e=cf (Ï)
Reading from RAM(r): 004be10e=cf (Ï)
Reading from physical memory(r): 004be10e=cf (Ï)
Reading from paged memory(r): c005c10e=cf (Ï)
MMU: Reading from real(r): 004be10f=00 ( )
Reading from RAM(r): 004be10f=00 ( )
Reading from physical memory(r): 004be10f=00 ( )
Reading from paged memory(r): c005c10f=00 ( )
BIU T1 E 0028:c00013bb 8E 44 24 38 mov es,word ss:[esp++38] RealRAM(r):043c7ed0=13(); RAM(r):043c7ed0=13(); Physical(r):043c7ed0=13(); Paged(r):c13fbed0=13(); RealRAM(r):043c7ed1=02(); RAM(r):043c7ed1=02(); Physical(r):043c7ed1=02(); Paged(r):c13fbed1=02(); #GP fault(00000210)!; Normal(w):c13fbe94=16(); Paged(w):c13fbe94=16(); Physical(w):043c7e94=16(); RAM(w):043c7e94=16(); RealRAM(w):043c7e94=16(); Normal(w):c13fbe95=00( ); Paged(w):c13fbe95=00( ); Physical(w):043c7e95=00( ); RAM(w):043c7e95=00( ); RealRAM(w):043c7e95=00( ); Normal(w):c13fbe96=00( ); Paged(w):c13fbe96=00( ); Physical(w):043c7e96=00( ); RAM(w):043c7e96=00( ); RealRAM(w):043c7e96=00( ); Normal(w):c13fbe97=00( ); Paged(w):c13fbe97=00( ); Physical(w):043c7e97=00( ); RAM(w):043c7e97=00( ); RealRAM(w):043c7e97=00( ); Normal(w):c13fbe90=28((); Paged(w):c13fbe90=28((); Physical(w):043c7e90=28((); RAM(w):043c7e90=28((); RealRAM(w):043c7e90=28((); Normal(w):c13fbe91=00( ); Paged(w):c13fbe91=00( ); Physical(w):043c7e91=00( ); RAM(w):043c7e91=00( ); RealRAM(w):043c7e91=00( ); Normal(w):c13fbe92=00( ); Paged(w):c13fbe92=00( ); Physical(w):043c7e92=00( ); RAM(w):043c7e92=00( ); RealRAM(w):043c7e92=00( ); Normal(w):c13fbe93=00( ); Paged(w):c13fbe93=00( ); Physical(w):043c7e93=00( ); RAM(w):043c7e93=00( ); RealRAM(w):043c7e93=00( ); Normal(w):c13fbe8c=bb(»); Paged(w):c13fbe8c=bb(»); Physical(w):043c7e8c=bb(»); RAM(w):043c7e8c=bb(»); RealRAM(w):043c7e8c=bb(»); Normal(w):c13fbe8d=13(); Paged(w):c13fbe8d=13(); Physical(w):043c7e8d=13(); RAM(w):043c7e8d=13(); RealRAM(w):043c7e8d=13(); Normal(w):c13fbe8e=00( ); Paged(w):c13fbe8e=00( ); Physical(w):043c7e8e=00( ); RAM(w):043c7e8e=00( ); RealRAM(w):043c7e8e=00( ); Normal(w):c13fbe8f=c0(À); Paged(w):c13fbe8f=c0(À); Physical(w):043c7e8f=c0(À); RAM(w):043c7e8f=c0(À); RealRAM(w):043c7e8f=c0(À); Normal(w):c13fbe88=10(); Paged(w):c13fbe88=10(); Physical(w):043c7e88=10(); RAM(w):043c7e88=10(); RealRAM(w):043c7e88=10(); Normal(w):c13fbe89=02(); Paged(w):c13fbe89=02(); Physical(w):043c7e89=02(); RAM(w):043c7e89=02(); RealRAM(w):043c7e89=02(); Normal(w):c13fbe8a=00( ); Paged(w):c13fbe8a=00( ); Physical(w):043c7e8a=00( ); RAM(w):043c7e8a=00( ); RealRAM(w):043c7e8a=00( ); Normal(w):c13fbe8b=00( ); Paged(w):c13fbe8b=00( ); Physical(w):043c7e8b=00( ); RAM(w):043c7e8b=00( ); RealRAM(w):043c7e8b=00( )
Registers:
EAX: 00000000 EBX: c15200e8 ECX: 00000000 EDX: c1029654
ESP: c13fbe98 EBP: c13fbf70 ESI: c13fbed4 EDI: c159f068
CS: 0028 DS: 0000 ES: 0030 FS: 018f GS: 0000 SS: 0030 TR: 0018 LDTR: 00d8
EIP: c00013bb EFLAGS: 00000016
CR0: 80000011 CR2: bff8d000 CR3: 004bf000 CR4: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 0000c005c0e001f7 IDTR: 0000800a900002ff
CS descriptor: 00CF9B000000FFFF
SS descriptor: 00CF93000000FFFF
DS descriptor: 00CF13000000FFFF
ES descriptor: 00CF93000000FFFF
FS descriptor: 8100F38022F40033
GS descriptor: 00CF13000000FFFF
TR descriptor: C0008B00AEBC2069
LDTR descriptor: 8000820990001FFF
FLAGSINFO: 0000000000ipfavr0n00oditsz0A0P1c

Edit: Observing what the exception error handling is doing, I see the following:

Observation of the error handling
some stored EBP is @c15200e8. Named stack frame -2. This is probably the last exception's stack frame.

previous stack frame is @c13fbf70 (exception source's EBP). Named stack frame -1.

invalid selector is located at 043c7ed0 (selector value 0213)

EFLAGS +2c
CS +28
EIP +24
error code (0210) +20
saved eax (0) +1c
saved ecx (0) +18
saved edx (c1029654) +14
saved ebx (0) +10
saved esp (c13fbe98) +c
saved ebp (c13fbf70) +8
saved esi (c13fbed4) +4
saved edi (c159f068) (stack frame 1) <- @c13fbe68 <- EBP <- ESP

0028:c00012c7 F6 45 2E 02 test byte ss:[ebp+2e],02 check for V86 mode, no match so go to c0001370 for protected mode
c001072c's data (c15200e8) is loaded into EBX from internal code state for some structure. Previous exception stack frame from observations below?
check ebp isn't the (previous?) stack frame pointed by EBX (it's the previous stack frame for exceptions?).
0028:c000144d 81 7D 24 B7 13 00 C0 cmp dword ss:[ebp+24],c00013b7 checks exception eip address for this value. Interestingly enough, we're just past there (at c00013bb).
0028:c0001456 81 7D 24 D2 13 00 C0 cmp dword ss:[ebp+24],c00013d2 another eip check. doesn't jump because not below that address. So we match the range specified.
Load ECX with EBP (c13fbe68, named stack frame 1), thus the current exception stack frame.
Load exception EIP into EAX.
Load previous exception stack frame EBP into EBP. EBP is now the previous stack frame(c13fbf70, stack frame -1) instead of the current stack frame.
Set EDX to the previous stack frame +3ch (location @c13fbfac). Might match the faulting instruction's esp+38 with 4 bytes of something discarded (error code?)
Check for address c00013b7 faulting. It's not matched, so not jumping to c0001490
Reaches 0028:c0001472.
Set EDX to previous stack frame's +38h location, thus perhaps some previous error code?
Check for fault address c00013bb. It matches, so it jumps to c0001490.
Set the previous stack frame error code to 0000h.
Pop registers, discard error code on the stack and return to the caller.

Looking further, it looks like the error handling is expecting
0028:c0001472 8D 55 38 lea edx,dword ss:[ebp+38]
To point to the same address as the caller's [esp+38].
But EBP used for that is pointing to the caller's EBP instead of the local ESP stack frame used by the faulting instruction?
It seems to expect that EBP is pointing to the stack of the faulting instruction at
0028:c0001464 2E 8B 6B 08 mov ebp,dword cs:[ebx+08]
But it's pointing to some other stack instead (at c15200e8h)?

It sounds like ESP is supposed to be the same as EBP when the exception occurs (from the logging of the fault handler executing and clearing a word selector on some stack)? But ESP (c13fbe98) isn't the same as the faulting EBP(c13fbf70), thus the exception handler seems to clear the wrong location in memory (instruction faulting being at 0028:c00013bb)?

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UniPCemu for Android, Windows, PSP, Vita and Switch on itch.io

Reply 617 of 652, by superfury

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Just rewrote ModR/M SIB disassembly to be formatted [displacement][+][base][+][index*scale], each component within brackets being optional and depending if the previous component is valid.
So for example, it can result in:
12345678+ESP
78+ESP
etc.

The + is only added when the previous component is present and used. Otherwise it's ommitted.
Both base(in the case of EBP with MOD=0) or index(for ESP only) can be ommitted as well (and displacement with MOD=0 and not EBP).

So previously disassembled "ESP+00"/"ESP+12345678" is now "00+ESP"/"12345678+ESP" etc.
This also gets rid of the double disasembled "++" with "ESP++38" for example.
Edit: Changed the order of the SIB interpretation disassembly to be base,index,displacement.
So it can become disassembled as ESP+12345678 (ESP base and index with 32-bit immediate), ESP+12 (ESP base and index with 8-bit immediate (sign-extended)),ESP+EBP*4+12(ESP base, EBP index and 8-bit displacement (sign-extended)), ESP+EBP*4+12345678 (ESP base with EBP index and 32-bit displacement) etc.
The exceptions here being EBP base with MOD=0(no base), ESP index being none, MOD=0 without EBP being no displacement (index just having ESP as an exception).

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Reply 618 of 652, by superfury

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OK. Found some issues with the Pentium Pro save state map for SMM:
- CR3 wasn't saved or restored.
- FS and GS selectors weren't saved or restored.
- On Pentium Pro and up, PDPTE weren't saved (though unused by the crashing operating systems, except Windows NT 4.0 perhaps). As they're undocumented for the used save state map version (used on CPUs before P4, from P5 and P6 save state maps on https://www.sandpile.org/x86/smm.htm ), simply store the added lower 128KB region from the P4 SMM map instead (to provide some compatibility if it's detected somehow). It's unknown what the exact PDPTE storage is for P6 SMM with PAE support afaik.

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Reply 619 of 652, by superfury

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With those fixes, I now see the following at the error address:
00298:C00013BB is the location that still crashes.
ESP is C13FBE98, with EBP being C13FBF70
FS points to selector 18F, which is located at 818012F4 (limit 33h, access rights F3h).
DS is invalidated, all others (CS/SS/ES) being plain 4GB segments.
The instruction executing is "MOV ES,word SS:[ESP+38]".
So the faulting instruction didn't change, but some other information (mainly FS) did change. The LDTR also points to D8, with base 98000h and limit 1FFFh.
But the crash isn't on a LDT segment, but a GDT segment still (location C13FBED0 containing 0213h, which is out of GDT range).

The error code pushed is 0210h.

Looking further up the stack for another kernel address I find one, then looking at said kernel address displays some data, followed by the letters THCB? Perhaps that's an indicator of what's going wrong?

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