Thanks for the additional tests. This confirms that the Am5x86 is recognized as a DX4-S when in x3 multiplier and L1 cache WT mode, and this is also what I see in the CPU detection table inside the BIOS.
It appeared that the #401A0-0101 (11/23/94) BIOS is a perfect fit for the patches I described in the DIY BIOS Modding guide #part 3:
Re: Diy modding support for k6+And 120gb hard drives into bios roms
and #part 4:
Re: Diy modding support for k6+And 120gb hard drives into bios roms
so you can follow these descriptions to have an idea what I changed in your PVI-486SP3 BIOS.
List of changes/bugfixes:
- Fixed the Year 2094 bug. This bug caused the year to jump forward to 2094 at each boot-up whenever the date was set to 1-1-2000 or later.
- Fixed the 2GB HDD display limit bug for correct drive size indication up to 8GB
- Added detection of the Am5x86 and the Enhanced Am486DX4. Both these CPUs will now be displayed as DX4-S, instead of Unknown or an 80486DX2. They should run fine now, provided they are set to L1 cache WT mode.
- Changed the Busspeed detection to include x4 mode for the Am5x86. (A small remaining cosmetic issue is that 4x33MHz is indicated as 132MHz i.s.o. 133MHz.)
Here is this #401A0-0101 patch J.1 BIOS for you to try:
The attachment 4SP3_J1.zip is no longer available
Note that this patched BIOS doesn’t have any support for L1 cache WB mode (yet).
There isn’t even a BIOS option in the 0101 BIOS to Enable/Disable Internal cache WB, and I’ve never seen a 1994 Award BIOS where this option was automatic. So I’m wondering if the SiS 496/497 Rev A4 chipset even has working L1 WB support.
To find out if the 0101 BIOS has any L1 WB support, like for the i486DX2WB (P24D), I need to disassemble and analyze the BIOS code and this takes some time. I expect to have time for that in about a month.
Please let me know how this 0101 patch J.1 BIOS works with an Am5x86 CPU.
Happy holidays, Jan