I think the two cards are identical.
Just the SIIG one has stickers over the same chips.

As impressive the Holtek VLB EIDE controllers are, their ISA stuff is not like that.
In reasonable ISA frequency they are the same as everybody else.
Dont handle well ISA overclock.

Recently i checked HT6550.

pshipkov wrote on 2024-05-29, 04:18:

I think the two cards are identical.
Just the SIIG one has stickers over the same chips.

Definitely no Holtek chip on the card that I have. It’s just a sticker over unpopulated contacts.

Right. Had to look again at the oic you provided.
So that ht6535 seems to be the LPT implementation actually.

pshipkov wrote on 2024-05-30, 05:06:

Right. Had to look again at the oic you provided.
So that ht6535 seems to be the LPT implementation actually.

Ahh. I see that the card with the HT6535 chop has additional LPT headers. The second LPT chip makes sense now. Thanks for helping me out there.

So my only remaining question is: "what is that 2KB SRAM chip doing" ?

Wouldn't there need to be some sort of IDE controller on the card if it was going to use a buffer?

douglar wrote on 2024-05-30, 17:31:

So my only remaining question is: "what is that 2KB SRAM chip doing" ?

Wouldn't there need to be some sort of IDE controller on the card if it was going to use a buffer?

Likely the 2K SRAM chip is visible in the ROM window of the card, and will be used by the IDE BIOS to store the drive geometries. Possibly only a small amount (like 64 bytes) of the chip is accessible, as that's all you need for that stuff.

mkarcher wrote on 2024-05-30, 17:42:

douglar wrote on 2024-05-30, 17:31:

So my only remaining question is: "what is that 2KB SRAM chip doing" ?
Wouldn't there need to be some sort of IDE controller on the card if it was going to use a buffer?

Likely the 2K SRAM chip is visible in the ROM window of the card, and will be used by the IDE BIOS to store the drive geometries. Possibly only a small amount (like 64 bytes) of the chip is accessible, as that's all you need for that stuff.

That sort of makes sense. The only nagging through is that it would have been less expensive to steal 2KB bytes of conventional memory. Why add a chip when you don't have to?

Here's the back of the card.

The 2Kb buffer is too big for what mkarcher speculated and too small for data cache.
It probably is for instructions cache to avoid the need of ROM shadowing through mobo bios.
Some SCSI controllers from that time do the same.

ECP parallel ports include support for a FIFO buffer; could it tbe that?

afaik small fifos, like 8-16 bytes

The SRAM chip is present in both cards, where one of them has the Holtek LPT IC + header and the other does not.
So, it is unlikely the SRAM buffer is LPT related.

It is not clear from the pictures how and where the SRAM pins are connected.
Looks like on the front quite a few of them go to the EPROM.

Anyhow.

mkarcher wrote on 2024-02-28, 20:49:

I guess it's a matter of cost cutting. Implementing bus mastering on the ISA bus is way more complicated than to respond to 16-bit I/O on port 1F0h. A bus master card has to generate the timing of the bus cycle, and it has to make sure the ISA bus is returned to refresh onece every 15µs. At a sensible bus master burst rate of 4MB/s (1WS at 6MHz bus clock), the transfer of 512 bytes still takes 128µs, so a sector burst has to be interrupted around 8 times. It seems WD didn't have a chip for that at hand, and adding an external busmaster DMA engine would have added significant complexity (and cost) to the card, most likely making the floppy controller no longer fit on the same card.

Someone found this EIDE Master ISA SIIG card: https://theretroweb.com/expansioncard/documen … 0e910387475.pdf
It has jumpers for DMA 5 and DMA 6.
It claims, "The EIDE Master ISA is the only ISA IDE card available on the current market that provides Multiword DMA transfer hardware (up to 8.33 MB/sec). It breaks the bottleneck of IDE performance."
However, the datasheet for the Winbond chip on it, says, "The IDE interface is essentially the AT bus ported to the hard disk drive. The hard disk controller resides on the IDE hard disk drive. So the IDE interface provides only chip select signals and AT bus signals between the IDE hard disk drive and ISA slot. Table 3-1 shows the IDE registers and their ISA addresses."
So it must just be ISA DMA, and will never achieve 8.33MB/sec, and will add a 16MB RAM boundary issue to IDE access?

jakethompson1 wrote on 2026-08-28, 01:08:

Someone found this EIDE Master ISA SIIG card
However, the datasheet for the Winbond chip on it, says...
So it must just be ISA DMA, and will never achieve 8.33MB/sec, and will add a 16MB RAM boundary issue to IDE access?

Not that simple, https://theretroweb.com/expansioncards/s/siig … eide-master-isa
has 2KB or SRAM GM76C28A on board and two pesky PAL chips with enough logic elements inside to implement busmastering state machine.
This might actually be a black swan. Would LOOVE too see some tests of this card.
Sadly pal16v8h cant be easily dumped when protected (and im guessing they are protected) so would have too look into Arcade nerds for clues about dumping using glitching rigs = probability of cloning this card are very small without owner of one being very dedicated

I’ve got these similar cards. I was hoping that picoide might be able to shed some light on what protocol they like to speak, but maybe I need to get out a logic probe instead

https://theretroweb.com/expansioncards/s/siig … -isa-i-o-cn2424
https://theretroweb.com/expansioncards/s/cent … s-ci-5000-rev-a

I see but those two don't have the 16-bit DMA channels 5 and 6 jumpers like the above card.
Were there Windows 95 drivers for any of these cards? If not, any special features would disappear as soon as you ended up in Win95, so if there were truly any special features, they would have wanted to supply a driver.

douglar wrote on 2026-08-28, 03:46:

https://theretroweb.com/expansioncards/s/siig … -isa-i-o-cn2424

no PALs, no sram, DMA jumpers for LPT part only

douglar wrote on 2026-08-28, 03:46:

https://theretroweb.com/expansioncards/s/cent … s-ci-5000-rev-a

PAL, most likely sram under the sticker, DMA jumpers for LPT part only
The question is why PALs and SRAM here? are those really for ram caching tiny 2KB rom?

jakethompson1 wrote on 2026-08-28, 05:28:

I see but those two don't have the 16-bit DMA channels 5 and 6 jumpers like the above card.

now that you mention it, those are 16bit dma channels but the sram is 8bit 🙁 and upper 8 bits of IDE is hard wired to ISA bus 🙁
and even if those were 8bit dma there isnt enough logic on the board to redirect upper 8bits of IDE to the sram
whats more tracing https://theretroweb.com/expansioncards/s/siig … eide-master-isa DRQ/DACK from the jumpers tracks go straight under the ROM, then jump to front of PCB thru VIAs and 99.9% sure they go straight up to be wired to IDE connector DMARQ/DMACK = ISA DMA
and final nail in the coffin - ISA D17 MASTER is not wired at all on any of the cards 🙁 dreams crushed. Sorry for giving false hope

rasz_pl wrote on 2026-08-28, 08:57:

PAL, most likely sram under the sticker, DMA jumpers for LPT part only
The question is why PALs and SRAM here? are those really for ram caching tiny 2KB rom?

Most likely the 2K SRAM is for IDE parameter storage. 2KB is a lot, but I guess the smallest SRAM chip available as standard item at that time.

rasz_pl wrote on 2026-08-28, 08:57:

no PALs, no sram, DMA jumpers for LPT part only […]
Show full quote

douglar wrote on 2026-08-28, 03:46:

https://theretroweb.com/expansioncards/s/siig … -isa-i-o-cn2424

no PALs, no sram, DMA jumpers for LPT part only

douglar wrote on 2026-08-28, 03:46:

https://theretroweb.com/expansioncards/s/cent … s-ci-5000-rev-a

PAL, most likely sram under the sticker, DMA jumpers for LPT part only
The question is why PALs and SRAM here? are those really for ram caching tiny 2KB rom?

jakethompson1 wrote on 2026-08-28, 05:28:

I see but those two don't have the 16-bit DMA channels 5 and 6 jumpers like the above card.

now that you mention it, those are 16bit dma channels but the sram is 8bit 🙁 and upper 8 bits of IDE is hard wired to ISA bus 🙁
and even if those were 8bit dma there isnt enough logic on the board to redirect upper 8bits of IDE to the sram
whats more tracing https://theretroweb.com/expansioncards/s/siig … eide-master-isa DRQ/DACK from the jumpers tracks go straight under the ROM, then jump to front of PCB thru VIAs and 99.9% sure they go straight up to be wired to IDE connector DMARQ/DMACK = ISA DMA
and final nail in the coffin - ISA D17 MASTER is not wired at all on any of the cards 🙁 dreams crushed. Sorry for giving false hope

None of those cards perform outside the expected range for ISA IDE controllers, even though one has a tans ts8310 controller that is usually used on VLB IDE controller on one and the SRAM on the other, so theres no performance gains. Nice cards, very compatible, but not any faster.

I don't know that ISA DMA is compatible with MWDMA. Even VLB IDE controllers don't go DMA from the board into main memory. Seems like that would be a double plus hard thing to implement even with a lot of extra busmaster circuitry.

Nothing in the available ROMs suggest that they are enabling MWDMA on the storage.

Even PCI didn't get it right for a while 😁. Actually I'm not sure it was really solid until SATA came in.

douglar wrote on 2026-09-01, 20:27:

I don't know that ISA DMA is compatible with MWDMA. Even VLB IDE controllers don't go DMA from the board into main memory. Seems like that would be a double plus hard thing to implement even with a lot of extra busmaster circuitry.

Nothing in the available ROMs suggest that they are enabling MWDMA on the storage.

I believe the single and multi-word DMA modes on IDE are inspired directly by modes of operation on the 8237 in the PC, so they should be compatible.
The problem is, the 8237 is so slow that PIO is faster. Much of the rest of my thinking is from discussions with mkarcher (both on threads and direct messages). In EISA systems, or motherboards like Intel Socket 4 ones that don't have EISA slots but do have an EISA DMA controller, it's possible to use "type A" and "type B" DMA to ISA slots, which might make MWDMA a bit faster than the 8237. But obviously most users wouldn't have access to that.
Gemini suggested there may have been IDE tape drives that could use MWDMA over an ISA slot, but when I challenged it to give me some examples, everything it named looked like it was SCSI, so probably an AI hallucination. If there were indeed such drives, they probably came with a dedicated ISA card, since the system's built in IDE wouldn't have the DMA pins hooked to anything.

jakethompson1 wrote on 2026-09-10, 21:42:

I believe the single and multi-word DMA modes on IDE are inspired directly by modes of operation on the 8237 in the PC, so they should be compatible.

Where did you get that idea? I thought that the mwdma spec from 1994 was specifically designed to work with the PCI from the previous year, not the 8237 which was much much older.

edit: after all, multi word sort of implies a burst mode, no?