VOGONS


Bare 3Dfx Voodoo 2 board pictures

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Reply 21 of 29, by TelamonLivesOn

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sdz wrote on 2021-04-10, 23:55:

There are no unused TMU pins on the reference design.

Ah, ok. Could sdram be somehow adapted to replace the need for EDO RAM? I say this because EDO ram is much harder to find and more expensive than SDRAM.

Reply 24 of 29, by strobo

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I was looking for pinouts for the FBI and TMU to repair my Voodoo 2 (Creative CT6670) but couldn't find any. Right now I'm trying to figure out the connections between the chips to understand the architecture and know where to put my oscilloscope probe.

If anyone has something, please let me know. Otherwise I'll be happy to share the (partial) results once I'm (patially) done, with questions added when I'm not sure what the pins are doing. Which will likely be most of them.

sdz, thanks for the pictures!

Reply 25 of 29, by TelamonLivesOn

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strobo wrote on 2021-04-11, 11:50:

I was looking for pinouts for the FBI and TMU to repair my Voodoo 2 (Creative CT6670) but couldn't find any. Right now I'm trying to figure out the connections between the chips to understand the architecture and know where to put my oscilloscope probe.

If anyone has something, please let me know. Otherwise I'll be happy to share the (partial) results once I'm (patially) done, with questions added when I'm not sure what the pins are doing. Which will likely be most of them.

sdz, thanks for the pictures!

The only thing I can say is that the FBI chip interfaces with the PCI Bus and some RAM, while the TMUs interface with the FBI and lots of RAM. I recommend looking at the FBI first, before looking at the TMUs.

Edit: Here are some DOCS which might help some: http://ohwc.narod.ru/video/3dfx.html. They don't have pinouts, but they do have some chip information.

Reply 26 of 29, by sdz

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The architecture is something like this:

FBI:
-unidrectional (output) 16 bit DDR data bus, going to both TMUs. Besides the 16 bit data bus there are also some address pins (since the TMUs are connected on the same bus) and CLK.
-unidirectional (input) 16 bit DDR data bus, coming from TMU0, similar to the one above, but no address pins.

TMU:
-unidirectional(input) 16 bit DDR data bus, with address pins and CLK, coming from the FBI
-unidirectional(input) 16 bit DDR data bus, with CLK, coming from the previous TMU in case of TMU0 on reference cards, or just unconnected, in case of TMU1 on reference cards.
-unidirectional(output) 16 bit DDR data bus, with CLK, going to FBI

Reply 28 of 29, by sdz

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You can figure the direction by looking at the position of the series termination resistors (10-22-47R), they are placed near the source. The best is to check on cards based on the older reference design (like CT6670), as the newer reference design is missing some, IIRC for the TMU output.

Reply 29 of 29, by anthony

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These serial terminators are mandatory only for long traces. If chips are placed closely absolutely no need to place them. I had no problem without these on my v2 sli project. I would not recommend to develop any v2 projects, since sources for tmu chips are depleting (or already depleted) and chip harvesting is not a good option.